Semiconductor devices having upper and lower solder portions and methods of fabricating the same
A semiconductor device includes a package substrate, a semiconductor chip on a first region of the package substrate, and a solder bump on a second region of the package substrate. The solder bump includes a core portion and a peripheral portion encapsulating the core portion. The peripheral portion includes a first segment with a first melting point and a second segment with a second melting point that is less than the first melting point.
1. A semiconductor device comprising:
a first package substrate;
a second package substrate; and
a solder joint between the first package substrate and the second package substrate,
wherein the solder joint comprises:
a core portion;
a lower solder portion comprising an Sn—Ag based alloy or an Sn—Cu based alloy, the lower solder portion having a first melting point and being disposed on and contacting a first contact pad of the first package substrate; and
an upper solder portion comprising an Sn—Pb based alloy or an Sn—Bi based alloy, the upper solder portion having a second melting point and being disposed on and contacting a second contact pad of the second package substrate and an uppermost surface of the lower solder portion,
wherein the lower solder portion at least partially envelops the core portion,
wherein the core portion has a melting point greater than the first melting point and the second melting point, and
wherein a height of the core portion is less than one-fifth to one-third of a height of the solder joint.
2. The semiconductor device of claim 1 , wherein the second melting point is less than the first melting point.
3. The semiconductor device of claim 2 , wherein the second melting point is less than the first melting point by a temperature of about 20° C. to about 100° C.
4. The semiconductor device of claim 2 , wherein the first melting point is in a range of about 210° C. to about 230° C., and
the second melting point is in a range of about 135° C. to about 190° C.
5. The semiconductor device of claim 1 , wherein the lower solder portion is a lower part of the solder joint near the first package substrate and the upper solder portion is an upper part of the solder joint opposite the first package substrate.
6. The semiconductor device of claim 1 , wherein the core portion is disposed inside the lower solder portion.
7. The semiconductor device of claim 1 , further comprising a mold layer covering the first package substrate and the solder joint, an upper portion of the solder joint being exposed from the mold layer.