IP Library › Granted Patent US 10,956,218
Granted Patent B2
US 10,956,218 · App. 16/694,128 · Granted Mar 23, 2021

Enqueuing kernels from kernels on GPU/CPU

Inventor: Aaftab A. Munshi (Los Gatos, CA)
Assignee: Apple Inc.
G06F9/5027G06F9/5044
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Quick Facts
Patent No.
US 10,956,218
App. No.
16/694,128
Granted
Mar 23, 2021
Kind
B2
Abstract

Graphics processing units (GPUs) and other compute units are allowed to enqueue tasks for themselves by themselves, without needing a host processor to queue the work for the GPU. Built-in functions enable kernels to enqueue kernels for execution on a device. In some embodiments, ndrange kernels execute over an N-dimensional range to provide data-parallel operations. Task kernels provide task-parallel operations. In some embodiments, kernels may be defined using clang block syntax. The order of execution of commands on a compute unit may be constrained or allow execution of commands out-of-order. Compute units may control when kernels enqueued by the compute unit begins execution.

Claims (28)

1. A program storage device, on which are stored instructions, comprising instructions that when executed cause one or more compute units to:

enqueue a first kernel by a first compute unit for execution on a second compute unit, wherein the first and second compute units have different capabilities;

determine, based on the execution of the first kernel, that a condition is met; and

in response to the condition being met based on the execution of the first kernel, enqueue a second kernel for execution on the second compute unit.

2. The program storage device of claim 1 , wherein the first compute unit is a central processing unit (CPU) and the second compute unit is a graphic processing unit (GPU).

3. The program storage device of claim 1 , wherein the second kernel is enqueued after execution of the first kernel is complete.

4. The program storage device of claim 1 , wherein the second kernel is enqueued during execution of the first kernel.

5. The program storage device of claim 1 , wherein the first kernel is a data-parallel kernel, and wherein the second kernel is a data-parallel kernel with a different range than the first kernel.

6. The program storage device of claim 1 , wherein the first kernel is a task-parallel kernel, and wherein the second kernel is a task-parallel kernel.

7. The program storage device of claim 1 , wherein the first kernel is a task-parallel kernel, and wherein the second kernel is a data-parallel kernel.

8. The program storage device of claim 1 , wherein the first kernel is a data-parallel kernel, and wherein the second kernel is a task-parallel kernel.

9. The program storage device of claim 1 , wherein the second compute unit enqueues a barrier on a queue of commands to blocks execution of commands enqueued on the queue of commands after the barrier until the barrier completes.

10. The program storage device of claim 1 , wherein the second compute unit enqueues a marker on a queue of commands that does not complete until one or more other commands completes.

11. A computing device, comprising:

one or more compute units; and

a global memory, coupled to the one or more compute units, on which are stored instructions that when executed cause the one or more compute units to:

enqueue a first kernel by a first compute unit for execution on a second compute unit, wherein the first and second compute units have different capabilities;

determine, based on the execution of the first kernel, that a condition is met; and

in response to the condition being met based on the execution of the first kernel, enqueue a second kernel for execution on the second compute unit.

12. The computing device of claim 11 , wherein the first compute unit is a central processing unit (CPU) and the second compute unit is a graphic processing unit (GPU).

13. The computing device of claim 11 , wherein the second kernel is enqueued after execution of the first kernel is complete.

14. The computing device of claim 11 , wherein the second kernel is enqueued during execution of the first kernel.

15. The computing device of claim 11 , wherein the first kernel is a data-parallel kernel, and wherein the second kernel is a data-parallel kernel with a different range than the first kernel.

16. The computing device of claim 11 , wherein the first kernel is a task-parallel kernel, and wherein the second kernel is a task-parallel kernel.

17. The computing device of claim 11 , wherein the first kernel is a task-parallel kernel, and wherein the second kernel is a data-parallel kernel.

18. The computing device of claim 11 , wherein the first kernel is a data-parallel kernel, and wherein the second kernel is a task-parallel kernel.

19. The computing device of claim 11 , wherein the second compute unit enqueues a barrier on a queue of commands to blocks execution of commands enqueued on the queue of commands after the barrier until the barrier completes.

20. The computing device of claim 11 , wherein the second compute unit enqueues a marker on a queue of commands that does not complete until one or more other commands completes.

Continuity (3)
Continuation 14138967 · Dec 23, 2013
Provisional Application 61856513 · Jul 19, 2013
Related Publication 20200167200A1 · May 28, 2020