IP Library › Granted Patent US 10,957,273
Granted Patent B2
US 10,957,273 · App. 16/689,318 · Granted Mar 23, 2021

Display driver, electro-optical device, and electronic apparatus

Inventors: Akihiro Tomie (Okaya, JP); Akira Morita (Chino, JP)
Assignee: SEIKO EPSON CORPORATION
G09G3/3688G09G3/3614G09G3/3677G09G2310/027G09G2310/0251G09G2310/0291G09G2310/0297
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,957,273
App. No.
16/689,318
Granted
Mar 23, 2021
Kind
B2
Abstract

A display driver includes a processing circuit configured to output display data, a D/A conversion circuit configured to D/A-convert the display data output from the processing circuit, a data voltage output terminal, and an amplifier circuit configured to output a data voltage to the data voltage output terminal on the basis of a D/A conversion result output from the D/A conversion circuit. In a pre-charge period, the processing circuit outputs first pre-charge data as pre-charge data for a D/A conversion circuit DACi, and outputs second pre-charge data different from the first pre-charge data as pre-charge data for a D/A conversion circuit DACj.

Claims (28)

1. A display driver comprising:

a processing circuit configured to output display data;

first to nth D/A conversion circuits configured to D/A-convert the display data output from the processing circuit, and to output a D/A conversion result, n being an integer of 3 or greater;

first to nth data voltage output terminals; and

first to nth amplifier circuits configured to output first to nth data voltages to the first to nth data voltage output terminals based on the D/A conversion result output from the first to nth D/A conversion circuits, wherein

in a pre-charge period, the processing circuit outputs pre-charge data, the first to nth D/A conversion circuits D/A-convert the pre-charge data, and the first to nth amplifier circuits output a pre-charge voltage based on an output voltage of the first to nth D/A conversion circuits,

the processing circuit, in the pre-charge period, outputs first pre-charge data as the pre-charge data for an ith D/A conversion circuit, and outputs second pre-charge data as the pre-charge data for a jth D/A conversion circuit, the second pre-charge data being different from the first pre-charge data, i being an integer from 1 to n, j being an integer from 1 to n, and not equal to i,

a first pre-charge voltage corresponding to the first pre-charge data and a second pre-charge voltage corresponding to the second pre-charge voltage are negative with respect to a common voltage, and

the second pre-charge voltage is lower than the first pre-charge voltage.

2. The display driver according to claim 1 , wherein

the first to nth data voltage output terminals are arranged along a long side direction of the display driver; and

1≤i≤p−1 or q+1≤i≤n, and p≤j≤q, wherein p and q are integers from 2 to n−1.

3. The display driver according to claim 1 , wherein

the processing circuit outputs third pre-charge data as the pre-charge data for a kth D/A conversion circuit in the pre-charge period, the third pre-charge data being different from the first pre-charge data and the second pre-charge data, wherein k is an integer from 1 to n; and

p≤j≤s−1 or t+1≤j≤q and s≤k≤t, wherein s and t are integers from p+1 to q−1.

4. The display driver according to claim 1 , wherein

the processing circuit outputs the first pre-charge data to the ith D/A conversion circuit and outputs the second pre-charge data to the jth D/A conversion circuit in the pre-charge period of a positive-polarity driving period; and

the processing circuit outputs common pre-charge data, as the pre-charge data, to the ith D/A conversion circuit and the jth D/A conversion circuit in the pre-charge period of a negative polarity driving period.

5. The display driver according to claim 1 , wherein

the processing circuit generates the pre-charge data of the pre-charge period based on display data of an immediately preceding line immediately preceding a line that is driven in a horizontal scanning period including the pre-charge period.

6. The display driver according to claim 5 , comprising a storage unit configured to store a correction coefficient, wherein

the processing circuit includes an arithmetic circuit configured to compute the pre-charge data based on the correction coefficient and the display data of the immediately preceding line.

7. The display driver according to claim 6 , wherein

the arithmetic circuit computes the pre-charge data of the pre-charge period in a horizontal scanning period immediately preceding the horizontal scanning period including the pre-charge period.

8. An electro-optical device comprising:

an electro-optical panel; and

the display driver according to claim 1 configured to drive the electro-optical panel.

9. An electronic apparatus comprising the display driver according to claim 1 .

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 20, 2019
From: TOMIE, AKIHIRO; MORITA, AKIRA
To: SEIKO EPSON CORPORATION
Reel/Frame 051062/0766 →
Priority Claims (1)
JP JP2018-217900 · Nov 21, 2018 · national
Continuity (1)
Related Publication 20200160807A1 · May 21, 2020