IP Library › Granted Patent US 10,957,801
Granted Patent B2
US 10,957,801 · App. 16/481,512 · Granted Mar 23, 2021

Semiconductor device and method for manufacturing semiconductor device

Inventors: Yasutaka Nakazawa (Tochigi, JP); Yukinori Shima (Gunma, JP); Kenichi Okazaki (Tochigi, JP); Junichi Koezuka (Tochigi, JP); Shunpei Yamazaki (Tokyo, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L29/7869G09F9/30H01L21/02164H01L21/02172H01L21/02274H01L21/02323H01L21/02554H01L29/517H01L29/66742H05B33/10H05B33/14
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Quick Facts
Patent No.
US 10,957,801
App. No.
16/481,512
Granted
Mar 23, 2021
Kind
B2
Abstract

A semiconductor device which has favorable electrical characteristics is provided. A method for manufacturing a semiconductor device with high productivity is provided. A method for manufacturing a semiconductor device with a high yield is provided. A method for manufacturing a semiconductor device includes a first step of forming a first insulating layer containing silicon and nitrogen, a second step of adding oxygen in a vicinity of a surface of the first insulating layer, a third step of forming a semiconductor layer containing a metal oxide over and in contact with the first insulating layer, a fourth step of forming a second insulating layer containing oxygen over and in contact with the semiconductor layer, a fifth step of performing plasma treatment in an atmosphere containing oxygen at a first temperature, a sixth step of performing plasma treatment in an atmosphere containing oxygen at a second temperature lower than the first temperature, and a seventh step of forming a third insulating layer containing silicon and nitrogen over the second insulating layer.

Claims (62)

1. A method for manufacturing a semiconductor device, comprising:

a first step of forming a first insulating layer containing silicon and nitrogen;

a second step of adding oxygen in a vicinity of a surface of the first insulating layer;

a third step of forming a semiconductor layer containing a metal oxide over and in contact with the first insulating layer;

a fourth step of forming a second insulating layer containing oxygen over and in contact with the semiconductor layer;

a fifth step of performing plasma treatment in an atmosphere containing oxygen at a first temperature;

a sixth step of performing plasma treatment in an atmosphere containing oxygen at a second temperature; and

a seventh step of forming a third insulating layer containing silicon and nitrogen over the second insulating layer,

wherein the second temperature is lower than the first temperature.

2. The method for manufacturing a semiconductor device, according to claim 1 ,

wherein the first temperature is higher than or equal to 250° C. and lower than or equal to 450° C., and

wherein the second temperature is higher than or equal to 150° C. and lower than or equal to 300° C.

3. The method for manufacturing a semiconductor device, according to claim 1 ,

wherein the fifth step is performed without exposure to atmospheric air after formation of the second insulating layer.

4. The method for manufacturing a semiconductor device, according to claim 1 , further comprising:

an eighth step of performing plasma treatment in an atmosphere containing oxygen at a third temperature between the third step and the fourth step,

wherein the third temperature is higher than the second temperature.

5. The method for manufacturing a semiconductor device, according to claim 1 ,

wherein the second insulating layer is formed at the first temperature.

6. A semiconductor device comprising:

a first conductive layer;

a first insulating layer;

a semiconductor layer;

a second insulating layer; and

a third insulating layer,

wherein the first conductive layer, the first insulating layer, the semiconductor layer, the second insulating layer, and the third insulating layer are stacked in this order,

wherein the first insulating layer contains silicon and nitrogen,

wherein the semiconductor layer contains a metal oxide,

wherein the second insulating layer contains oxygen,

wherein the third insulating layer contains silicon and nitrogen,

wherein the first insulating layer comprises a first region including a surface in contact with the semiconductor layer and the other second region, and

wherein the first region has a higher concentration of oxygen than the second region.

7. The semiconductor device according to claim 6 ,

wherein the second insulating layer has a lower concentration of nitrogen than the third insulating layer.

8. The semiconductor device according to claim 6 ,

wherein the second insulating layer has a smaller thickness than the third insulating layer.

9. The semiconductor device according to claim 6 ,

wherein a first metal oxide film and a second metal oxide film are stacked in the semiconductor layer,

wherein the first metal oxide film comprises a portion in contact with the first region of the first insulating layer,

wherein the second metal oxide film comprises a portion in contact with the second insulating layer, and

wherein the first metal oxide film has lower crystallinity than the second metal oxide film.

10. The semiconductor device according to claim 6 , further comprising:

a second conductive layer; and

a third conductive layer,

wherein the second conductive layer and the third conductive layer each comprise a portion in contact with the semiconductor layer and a portion positioned between the first insulating layer and the second insulating layer.

11. The semiconductor device according to claim 6 , further comprising:

a second conductive layer; and

a third conductive layer,

wherein the second conductive layer and the third conductive layer each comprise a portion positioned over the second insulating layer and a portion in contact with the semiconductor layer through an opening provided in the second insulating layer.

12. The semiconductor device according to claim 10 ,

wherein the second conductive layer and the third conductive layer each comprise a first conductive film, a second conductive film, and a third conductive film,

wherein the first conductive film comprises a portion in contact with the semiconductor layer,

wherein the second conductive film is provided over the third conductive film,

wherein the third conductive film is provided to cover a top surface and a side surface of the second conductive film and comprises a portion in contact with the first conductive film,

wherein the first conductive film and the second conductive film contain metal elements different from each other, and

wherein the second conductive film and the third conductive film contain metal elements different from each other.

13. The semiconductor device according to claim 12 ,

wherein the first conductive film and the third conductive film contain the same metal element, and

wherein the second conductive film contains a material having lower resistance than those of the first conductive layer and the third conductive layer.

14. The semiconductor device according to claim 12 ,

wherein the first conductive film and the third conductive film each contain titanium or molybdenum, and

wherein the second conductive film contains copper or aluminum.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 29, 2019
From: NAKAZAWA, YASUTAKA; SHIMA, YUKINORI; OKAZAKI, KENICHI; KOEZUKA, JUNICHI; YAMAZAKI, SHUNPEI
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 049884/0611 →
Priority Claims (1)
JP JP2017-020695 · Feb 7, 2017 · national
Continuity (1)
Related Publication 20190393354A1 · Dec 26, 2019
Cited By (2)
US 12,707,624 US 12,707,680