Hyper-dimensional computing device
The device provides a resistive memory device for storing elements of hyper-dimensional vectors, in particular digital hyper-dimensional, as conductive statuses in components in particular in 2D-memristors, of the resistive memory device, wherein the resistive memory device provides a first crossbar array of the components, wherein the components are memristive 2D components addressable by word-lines and bit-lines, and a peripheral circuit connected to the word-lines and bit-lines and adapted for encoding operations by activating the word-lines and bit-lines sequentially in a predefined manner.
1. A device for hyper-dimensional computing, the device comprising:
a resistive memory device for storing elements of hyper-dimensional vectors as conductive statuses in components of the resistive memory device,
wherein the resistive memory device comprises a first crossbar array of the components, wherein the components are memristive 2D components addressable by word-lines and bit-lines, and
a peripheral circuit, having an output portion, and being connected to the word-lines and bit-lines and adapted for encoding operations by activating the word-lines and bit-lines sequentially in a predefined manner, the peripheral circuit being further adapted to selectively activate word-lines of hyper-dimensional vectors in the crossbar array, wherein the selected hyper-dimensional vectors are to be bound together, and to determine an Ngram hyper-dimensional vector by a binding operation using the output portion of the peripheral circuit.
2. A device for hyper-dimensional computing, the device comprising:
a resistive memory device for storing elements of hyper-dimensional vectors as conductive statuses in components of the resistive memory device,
wherein the resistive memory device comprises a first crossbar array of the components, wherein the components are memristive 2D components addressable by word-lines and bit-lines, and
a peripheral circuit connected to the word-lines and bit-lines and adapted for encoding operations by activating the word-lines and bit-lines sequentially in a predefined manner;
wherein the cross-bar array of memristive 2D components comprises:
a plurality of pairs of columns of the memristive 2D components,
wherein a number of pairs of the memristive 2D components per row is equal to the dimensionality of the hyper-dimensional vectors,
wherein a first sub-column of each of the pairs of columns is adapted for storing positive values of the elements of a hyper-dimensional vectors stored and a second sub-column of each of the pairs of columns is adapted for storing corresponding negative values of the elements of hyper-dimensional vectors stored.
3. The device according to claim 2 , the peripheral circuit comprising:
a multiplexer per column which first input terminal is connected to the 2D memristive components of the first sub-column of a respective one of the pairs of columns, and which second input terminal is connected to the 2D memristive components of the second sub-column of a respective one of the pairs of columns, and
a one-bit minterm buffer per column connected to an output terminal of the multiplexer, wherein a plurality of all one-bit minterm buffers of all columns represent a minterm buffer of a binding of selected ones of hyper-dimensional vectors stored in the crossbar array.
4. The device according to claim 3 , the peripheral circuit also comprising:
a connection from an output of one of the one-bit minterm buffers via an OR-gate and a driver to a bit-line of a next pair of columns of the first crossbar array.
5. The device according to claim 4 , the peripheral circuit also comprises:
a minterm accumulation buffer comprising a plurality of one-bit minterm accumulation buffers, each of which being connected with its input line via an OR-gate to an output of one of the one-bit minterm buffers, such that a plurality of all one-bit minterm accumulation buffers represent an Ngram hyper-dimensional vector of a binding of selected item hyper-dimensional vectors.
6. A device for hyper-dimensional computing, the device comprising:
a resistive memory device for storing elements of hyper-dimensional vectors as conductive statuses in components of the resistive memory device,
wherein the resistive memory device comprises a first crossbar array of the components, wherein the components are memristive 2D components addressable by word-lines and bit-lines, and
a peripheral circuit connected to the word-lines and bit-lines and adapted for encoding operations by activating the word-lines and bit-lines sequentially in a predefined manner:
wherein each crossing of a bit-line and a word-line comprises a memristive 2D component, and
wherein output lines of memristive 2D components connected to a common bit-line are connected via a sense amplifier and an XOR-gate to a one-bit buffer, wherein a plurality of the one-bit buffers, each of which being related to one column of the first crossbar array, represents one bit of a resulting Ngram vector of a binding of selected item hyper-dimensional vectors, and
wherein an output of the one-bit buffer is connected to a next XOR-gate of a next column.
7. A device for hyper-dimensional computing, the device comprising:
a resistive memory device for storing elements of hyper-dimensional vectors as conductive statuses in components of the resistive memory device,
wherein the resistive memory device comprises a first crossbar array of the components, wherein the components are memristive 2D components addressable by word-lines and bit-lines, and
a peripheral circuit connected to the word-lines and bit-lines and adapted for encoding operations by activating the word-lines and bit-lines sequentially in a predefined manner:
wherein output lines of memristive 2D components connected to a common bit-line are connected via a sense amplifier to a one-bit minterm buffer, wherein a plurality of the one-bit minterm buffers, each of which being related to one column of the first crossbar array, represents one bit of a resulting Ngram vector of a binding of selected item hyper-dimensional vectors, and
wherein an output line of each of the one-bit minterm buffer is connected via an OR-gate to a bit-line of a next column.
8. A device for hyper-dimensional computing, the device comprising:
a resistive memory device for storing elements of hyper-dimensional vectors as conductive statuses in components of the resistive memory device,
wherein the resistive memory device comprises a first crossbar array of the components, wherein the components are memristive 2D components addressable by word-lines and bit-lines, and
a peripheral circuit connected to the word-lines and bit-lines and adapted for encoding operations by activating the word-lines and bit-lines sequentially in a predefined manner:
wherein the resistive memory device comprises a second crossbar array of the components, wherein the components are memristive 2D components addressable by word-lines and bit-lines,
wherein the first crossbar is adapted for storing item hyper-dimensional vectors, and the second crossbar array is adapted for storing complementary bit values of dimension values of the item hyper-dimensional vectors.
9. The device according to claim 8 :
wherein output lines of column output circuits of the first crossbar array and corresponding column output circuits of the second crossbar array are connected via an AND-gate to respective one-bit minterm buffers which output line is connected to the AND-gate of a respective next column output circuit via an OR-gate.
10. The device according to claim 9 , wherein the one-bit minterm buffers are pairwise connected to input lines of respective OR-gates, one relating to the first crossbar array and one relating to the second crossbar array,
such that a plurality of output lines of the respective OR-gates represent together a resulting Ngram vector of a binding of selected item hyper-dimensional vectors.
11. The device according to claim 8 :
wherein an output value of components relating to a common bit-line are connected via respective sense amplifiers to one-bit minterm buffers,
wherein an output line of each of the one-bit minterm buffers is connect via an OR-gate to a bit-line of a next column within their respective crossbar array.
12. The device according to claim 11 , wherein the one-bit minterm buffers are pairwise connected to input lines of respective OR-gates, one relating to the first crossbar array and one relating to the second crossbar array,
such that a plurality of output lines of the respective OR-gates represent together a resulting Ngram vector of a binding of selected item hyper-dimensional vectors.
13. A device for hyper-dimensional computing, the device comprising:
a resistive memory device for storing elements of hyper-dimensional vectors as conductive statuses in components of the resistive memory device,
wherein the resistive memory device comprises a first crossbar array of the components, wherein the components are memristive 2D components addressable by word-lines and bit-lines, and
a peripheral circuit connected to the word-lines and bit-lines and adapted for encoding operations by activating the word-lines and bit-lines sequentially in a predefined manner, also comprising:
a plurality of N crossbar arrays,
wherein each one of the plurality of N crossbar arrays is adapted for storing the plurality of item vectors, wherein the n-th crossbar array is adapted for storing the item vectors shifted by n-1 bits, and
wherein a plurality of peripheral circuit one-bit buffers represent an Ngram vector of a binding of selected item hyper-dimensional vectors.
14. The device according to claim 13 , wherein each one of the plurality of N crossbar arrays comprises:
a plurality of pairs of columns of the memristive 2D components, and
wherein a first sub-column of each of the pairs of columns is adapted for storing positive values of the elements of the hyper-dimensional vectors stored, and a second sub-column of each of the pairs of columns is adapted for storing corresponding negative values of the elements of hyper-dimensional vectors stored.
15. A device for hyper-dimensional computing, the device comprising:
a resistive memory device for storing elements of hyper-dimensional vectors as conductive statuses in components of the resistive memory device,
wherein the resistive memory device comprises a first crossbar array of the components, wherein the components are memristive 2D components addressable by word-lines and bit-lines, and
a peripheral circuit connected to the word-lines and bit-lines and adapted for encoding operations by activating the word-lines and bit-lines sequentially in a predefined manner, wherein each data line representing one dimension of the Ngram vector is connected to a summing circuit, wherein the plurality of summing circuits represent a sum of Ngram vectors.
16. The device according to claim 15 , wherein the output of each of the plurality of summing circuits representing a sum of Ngram vectors is each compared with a threshold value to determine a binary decision, which is input to a respective one of a plurality of one-bit decision buffers, and wherein the plurality of one-bit decision buffers represent a query or profile vector.
17. The device according to claim 16 , wherein the threshold depends on the number of terms used to generate one Ngram vector and the total number of Ngrams to be generated.
18. A method for hyper-dimensional computing comprising:
storing elements of hyper-dimensional vectors in a resistive memory device as conductive statuses in components of the resistive memory device, wherein the resistive memory device comprises a first crossbar array of the components, wherein the components are memristive 2D components addressable by word-lines and bit-lines, and
connecting a peripheral circuit to the word-lines and bit-lines which is adapted for encoding operations by activating the word-lines and bit-lines sequentially in a predefined manner,
activating selectively word-lines of hyper-dimensional vectors in the crossbar array, wherein the selected hyper-dimensional vectors are to be bound together, and
determining an Ngram hyper-dimensional vector by a binding operation using an output portion of the peripheral circuit.
19. The method according to claim 18 , wherein the determining the Ngram hyper-dimensional vector also comprises a feedback interaction of the output portion of the peripheral circuit to the crossbar array such that bit-lines of the crossbar array are selectively activated by the output portion of the peripheral circuit.
20. The method according to claim 18 , further comprising:
combining output signals from memristive 2D components in bit-lines by digital components so as to perform the encoding in the digital domain outside of the crossbar array.