Multi-chip structure and method of forming same
A device includes a first chip is embedded in a molding compound layer, wherein the first chip is shifted toward a first direction, a second chip over the first chip and embedded in the molding compound layer, wherein the second chip is shifted toward a second direction opposite to the first direction and a plurality of bumps between the first chip and the second chip.
1. A device comprising:
a molding compound layer, the molding compound layer having a first sidewall and a second sidewall opposite to the first sidewall;
a first chip embedded in the molding compound layer, wherein a first sidewall of the first chip is coplanar with the first sidewall of the molding compound layer, and wherein a second sidewall of the first chip is spaced apart from the second sidewall of the molding compound layer; and
a second chip over the first chip and embedded in the molding compound layer, wherein a first sidewall of the second chip is coplanar with the second sidewall of the molding compound layer, and wherein a second sidewall of the second chip is spaced apart from the first sidewall of the molding compound layer.
2. The device of claim 1 , further comprising a plurality of bumps electrically coupling the first chip to the second chip.
3. The device of claim 1 , wherein a portion of the molding compound layer is interposed between the first chip and the second chip.
4. The device of claim 1 , further comprising a redistribution structure over the molding compound layer, the first chip being interposed between the redistribution structure and the second chip, wherein a first sidewall of the redistribution structure is coplanar with the first sidewall of the molding compound layer, and wherein a second sidewall of the redistribution structure is coplanar with the second sidewall of the molding compound layer.
5. The device of claim 1 , wherein the first chip comprises a plurality of logic circuits, and wherein the second chip comprises a stack of memory dies.
6. The device of claim 4 , wherein a width of the redistribution structure is greater than a width of the first chip and a width of the second chip.
7. The device of claim 4 , wherein the second chip and the redistribution structure are separated by a portion of the molding compound layer.
8. A device comprising:
a molding compound layer;
a first chip embedded in the molding compound layer, a first sidewall of the first chip being in physical contact with the molding compound layer; and
a second chip over the first chip and embedded in the molding compound layer, a first sidewall of the second chip being in physical contact with the molding compound layer, wherein a portion of the first chip extends beyond the first sidewall of the second chip, and wherein a portion of the second chip extends beyond the first sidewall of the first chip.
9. The device of claim 8 , further comprising a redistribution structure in electrical contact with the first chip, the first chip electrically coupling the redistribution structure to the second chip.
10. The device of claim 9 , wherein a width of the redistribution structure is greater than a width of the first chip and a width of the second chip.
11. The device of claim 9 , further comprising a plurality of bumps bonded to the redistribution structure, the redistribution structure being interposed between the plurality of bumps and the first chip.
12. The device of claim 9 , wherein a first sidewall of the redistribution structure is coplanar with a second sidewall of the first chip, the second sidewall of the first chip being opposite to the first sidewall of the first chip.
13. The device of claim 12 , wherein a second sidewall of the redistribution structure is coplanar with a second sidewall of the second chip, the second sidewall of the second chip being opposite to the first sidewall of the second chip.
14. The device of claim 8 , further comprising a plurality of bumps interposed between the first chip and the second chip, wherein the plurality of bumps are encapsulated by the molding compound layer.
15. A method comprising:
attaching a first chip to a carrier;
bonding a second chip to the first chip; and
encapsulating the first chip and the second chip in a molding compound layer, the molding compound layer being in physical contact with a first sidewall of the first chip and a first sidewall of the second chip, wherein a portion of the first chip extends beyond the first sidewall of the second chip, and wherein a portion of the second chip extends beyond the first sidewall of the first chip.
16. The method of claim 15 , forming a redistribution structure over the second chip and the molding compound layer.
17. The method of claim 16 , bonding a plurality of bumps to the redistribution structure, the redistribution structure electrically coupling the plurality of bumps to the second chip.
18. The method of claim 16 , further comprising, before forming the redistribution structure, planarizing the molding compound layer to expose the second chip.
19. The method of claim 16 , wherein a first portion of the redistribution structure extends beyond the first sidewall of the first chip.
20. The method of claim 19 , wherein a second portion of the redistribution structure extends beyond the first sidewall of the second chip.