IP Library Granted Patent US 10,992,105
Granted Patent B2
US 10,992,105 · App. 16/434,236 · Granted Apr 27, 2021

Strain control in optoelectronic devices

Inventors: Lars F. Voss (Livermore, CA); Paul O. Leisher (Dublin, CA)
Assignee: LAWRENCE LIVERMORE NATIONAL SECURITY, LLC
H01S5/0612H01L33/641H01L33/642H01S5/028H01S5/34
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Quick Facts
Patent No.
US 10,992,105
App. No.
16/434,236
Granted
Apr 27, 2021
Kind
B2
Abstract

A coating having a mismatched coefficient of thermal expansion is applied to an underlying light emitting diode (LED) or laser diode (LD), such that as the temperature of the device changes, a varying level of strain is introduced to the underlying LED or LD. Because strain can also adjust the effective bandgap energy (and hence emission wavelength) of the device, the external strain-inducing coating can act to either compensate for the wavelength shift due to temperature (resulting in reduced dλ/dT) or accentuate it (resulting in increased dλ/dT). By proper selection of coating material and geometry, full control over dλ/dT can be achieved.

Claims (25)

1. An apparatus, comprising:

a substrate;

an array of three-dimensional semiconductor structures positioned above said substrate, wherein each three-dimensional semiconductor structure of said array of three-dimensional semiconductor structures comprises a first coefficient of thermal expansion (CTE), a bottom surface, a top surface and at least one side surface connecting said bottom surface and said top surface;

a cavity region between adjacent said three-dimensional semiconductor structures; and

a film located in each said cavity region and surrounding and in direct contact with each said side surface of each three-dimensional semiconductor structure of said three-dimensional semiconductor structures said film comprising second CTE that is different from that of said first CTE to produce a CTE mismatch.

2. The apparatus of claim 1 , wherein said array of three-dimensional semiconductor structures comprises a microstructured semiconductor device.

3. The apparatus of claim 2 , wherein said microstructured semiconductor device is selected from the group consisting of a laser diode and a light emitting diode.

4. The apparatus of claim 2 , wherein said microstructured semiconductor device is configured to produce an emission wavelength that depends upon temperature in a different way than would be exhibited by a said microstructured semiconductor device if said film having said second CTE were not fixedly attached to said semiconductor material.

5. The apparatus of claim 2 , wherein said microstructured semiconductor device is configured to result in a predetermined dλ/dT behavior.

6. The apparatus of claim 2 , wherein said microstructured semiconductor device comprises a microstructural geometry, wherein said microstructural geometry and said film are chosen such that said CTE mismatch results in straining of said semiconductor device during heating and cooling, such that the emission wavelength of the semiconductor material of said array of three-dimensional semiconductor structures possesses a different behavior versus temperature than would be exhibited if said film having said second CTE were not fixedly attached to said semiconductor material.

7. The apparatus of claim 1 , wherein said film comprises a material selected from the group consisting of a dielectric and a metal.

8. An apparatus, comprising:

a substrate;

an array of three-dimensional semiconductor structures positioned above said substrate, wherein each three-dimensional semiconductor structure of said array of three-dimensional semiconductor structures comprises a first coefficient of thermal expansion (CTE), a bottom surface, a top surface and at least one side surface connecting said bottom surface and said top surface, wherein said array of three-dimensional semiconductor structures comprises a microstructured semiconductor device;

a cavity region between adjacent said three-dimensional semiconductor structures; and

a film located in each said cavity region and surrounding each said side surface of each three-dimensional semiconductor structure of said three-dimensional semiconductor structures, said film comprising a second CTE that is different from said first CTE to produce a mismatched CTE, wherein said microstructured semiconductor device is configured to produce an emission wavelength that depends upon temperature in a different way than would be exhibited by a said microstructured semiconductor device if said film having said second CTE were not fixedly attached to said semiconductor material.

9. The apparatus of claim 8 , wherein said microstructured semiconductor device is configured to result in a predetermined dλ/dT behavior.

10. The apparatus of claim 8 , wherein said film comprises a material selected from the group consisting of a dielectric and a metal.

11. An apparatus, comprising:

a substrate;

an array of three-dimensional semiconductor structures positioned above said substrate, wherein each three-dimensional semiconductor structure of said array of three-dimensional semiconductor structures comprises a first coefficient of thermal expansion (CTE), a bottom surface, a top surface and at least one side surface connecting said bottom surface and said top surface, wherein said array of three-dimensional semiconductor structures comprises a microstructured semiconductor device;

a cavity region between adjacent said three-dimensional semiconductor structures; and

a film located in each cavity region and surrounding each said side surface of each said three-dimensional semiconductor structure of said three-dimensional semiconductor structures, said film comprising a second CTE that is different from said first CTE to produce a mismatched CTE, wherein said microstructured semiconductor device comprises a microstructural geometry, wherein said microstructural geometry and said film are chosen such that said mismatched CTE results in straining of said semiconductor device during heating and cooling, such that the emission wavelength of the semiconductor material of said three-dimensional semiconductor structures possesses a different behavior versus temperature than would be exhibited if said film were not fixedly attached to said semiconductor material.

12. The apparatus of claim 11 , wherein said microstructured semiconductor device is configured to result in a predetermined dλ/dT behavior.

13. The apparatus of claim 11 , wherein said film comprises a material selected from the group consisting of a dielectric and a metal.

Assignments (2)
CONFIRMATORY LICENSE (SEE DOCUMENT FOR DETAILS) Recorded Jan 25, 2021
From: LAWRENCE LIVERMORE NATIONAL SECURITY, LLC
To: U.S. DEPARTMENT OF ENERGY
Reel/Frame 055096/0225 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 7, 2019
From: VOSS, LARS F.; LEISHER, PAUL O.
To: LAWRENCE LIVERMORE NATIONAL SECURITY, LLC
Reel/Frame 049412/0284 →
Continuity (2)
Provisional Application 62684720 · Jun 13, 2018
Related Publication 20190386462A1 · Dec 19, 2019