IP Library › Granted Patent US 10,997,031
Granted Patent B2
US 10,997,031 · App. 16/263,496 · Granted May 4, 2021

System and method for log metadata automatic recovery on dual controller storage system

Inventors: Cheng Wan (Beijing, CN); Socheavy D. Heng (Framingham, MA); Xinlei Xu (Beijing, CN); Yousheng Liu (Beijing, CN); Baote Zhuo (Beijing, CN)
Assignee: EMC IP Holding Company LLC
G06F11/1435G06F3/061G06F3/067G06F3/0656G06F11/1469G06F11/1471
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Quick Facts
Patent No.
US 10,997,031
App. No.
16/263,496
Granted
May 4, 2021
Kind
B2
Abstract

A method, computer program product, and computer system for executing an automatic recovery of log metadata. A secondary storage processor may request one or more log metadata buffer values from a first buffer used by a primary storage processor. The secondary storage processor may update one or more log metadata buffer values from a second buffer used by the secondary storage processor.

Claims (41)

1. A computer-implemented method comprising:

executing an automatic recovery of log metadata;

requesting, by a secondary storage processor, one or more log metadata buffer values from a first buffer used by a primary storage processor;

updating, by the secondary storage processor, one or more log metadata buffer values from a second buffer used by the secondary storage processor;

adding one or more failed logical block addresses into a queue;

receiving, by the secondary storage processor, log metadata associated with the one or more failed logical block addresses, including requesting, by the secondary storage processor, that the primary storage processor return the log metadata associated with the one or more failed logical block addresses and persist the log metadata associated with the one or more failed logical block addresses; and

processing the one or more failed logical block addresses in a batch, wherein processing the one or more failed logical block addresses in the batch includes sending the one or more failed logical block addresses to the primary storage processor in one or more batches, wherein processing the one or more failed logical block addresses in the batch includes:

receiving, by the primary storage processor, the one or more failed logical block addresses in one or more batches;

searching the log metadata in a memory, the log data corresponding to the one or more failed logical block addresses;

persisting, by the primary storage processor, the log metadata corresponding to the one or more failed logical block addresses; and

sending the log metadata in one or more batches to the secondary storage processor.

2. The computer-implemented method of claim 1 wherein the first buffer includes a log metadata ring buffer.

3. The computer-implemented method of claim 1 wherein the one or more log metadata buffer values from the first buffer includes a head value and a tail value.

4. The computer-implemented method of claim 1 where updating the one or more log metadata buffer values from the second buffer used by the secondary storage processor includes updating the one or more log metadata buffer values from the second buffer used by the secondary storage processor with the one or more log metadata values from the first buffer used by the primary storage processor.

5. A computer program product residing on a computer readable storage medium having a plurality of instructions stored thereon which, when executed across one or more processors, causes at least a portion of the one or more processors to perform operations comprising:

executing an automatic recovery of log metadata;

requesting, by a secondary storage processor, one or more log metadata buffer values from a first buffer used by a primary storage processor;

updating, by the secondary storage processor, one or more log metadata buffer values from a second buffer used by the secondary storage processor;

adding one or more failed logical block addresses into a queue;

receiving, by the secondary storage processor, log metadata associated with the one or more failed logical block addresses, including requesting, by the secondary storage processor, that the primary storage processor return the log metadata associated with the one or more failed logical block addresses and persist the log metadata associated with the one or more failed logical block addresses; and

processing the one or more failed logical block addresses in a batch, wherein processing the one or more failed logical block addresses in the batch includes sending the one or more failed logical block addresses to the primary storage processor in one or more batches, wherein processing the one or more failed logical block addresses in the batch includes:

receiving, by the primary storage processor, the one or more failed logical block addresses in one or more batches;

searching the log metadata in a memory, the log data corresponding to the one or more failed logical block addresses;

persisting, by the primary storage processor, the log metadata corresponding to the one or more failed logical block addresses; and

sending the log metadata in one or more batches to the secondary storage processor.

6. The computer program product of claim 5 wherein the first buffer includes a log metadata ring buffer.

7. The computer program product of claim 5 wherein the one or more log metadata buffer values from the first buffer includes a head value and a tail value.

8. The computer program product of claim 5 where updating the one or more log metadata buffer values from the second buffer used by the secondary storage processor includes updating the one or more log metadata buffer values from the second buffer used by the secondary storage processor with the one or more log metadata values from the first buffer used by the primary storage processor.

9. A computing system including one or more processors and one or more memories configured to perform operations comprising:

executing an automatic recovery of log metadata;

requesting, by a secondary storage processor, one or more log metadata buffer values from a first buffer used by a primary storage processor;

updating, by the secondary storage processor, one or more log metadata buffer values from a second buffer used by the secondary storage processor;

adding one or more failed logical block addresses into a queue;

receiving, by the secondary storage processor, log metadata associated with the one or more failed logical block addresses, including requesting, by the secondary storage processor, that the primary storage processor return the log metadata associated with the one or more failed logical block addresses and persist the log metadata associated with the one or more failed logical block addresses; and

processing the one or more failed logical block addresses in a batch, wherein processing the one or more failed logical block addresses in the batch includes sending the one or more failed logical block addresses to the primary storage processor in one or more batches, wherein processing the one or more failed logical block addresses in the batch includes:

receiving, by the primary storage processor, the one or more failed logical block addresses in one or more batches;

searching the log metadata in a memory, the log data corresponding to the one or more failed logical block addresses;

persisting, by the primary storage processor, the log metadata corresponding to the one or more failed logical block addresses; and

sending the log metadata in one or more batches to the secondary storage processor.

10. The computing system of claim 9 wherein the one or more log metadata buffer values from the first buffer includes a head value and a tail value.

11. The computing system of claim 9 wherein updating the one or more log metadata buffer values from the second buffer used by the secondary storage processor includes updating the one or more log metadata buffer values from the second buffer used by the secondary storage processor with the one or more log metadata values from the first buffer used by the primary storage processor.

Assignments (4)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053546/0001) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC IP HOLDING COMPANY LLC
Reel/Frame 071642/0001 →
SECURITY AGREEMENT Recorded Apr 22, 2020
From: CREDANT TECHNOLOGIES INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 053546/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 6, 2019
From: WAN, CHENG; HENG, SOCHEAVY D; XU, XINLEI; LIU, YOUSHENG; ZHUO, BAOTE
To: EMC IP HOLDING COMPANY LLC
Reel/Frame 049089/0038 →
SECURITY AGREEMENT Recorded Mar 21, 2019
From: CREDANT TECHNOLOGIES, INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 049452/0223 →
Continuity (1)
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