ESD protection diode
View Patent ↗A semiconductor device according to an embodiment includes a semiconductor layer that has first and second plane and includes first-conductivity-type first semiconductor region, second-conductivity-type second semiconductor region between the first semiconductor region and the first plane, first-conductivity-type third semiconductor region between the second semiconductor region and the first plane and has a lower first-conductivity-type impurity concentration than the first semiconductor region, and second-conductivity-type fourth semiconductor region between the third semiconductor region and the first plane and has a higher second-conductivity-type impurity concentration than the second semiconductor region; a first electrode on a side of the first plane of the semiconductor layer and is electrically connected to the third semiconductor region and the fourth semiconductor region; and a second electrode on a side of the second plane of the semiconductor layer, is electrically connected to the first semiconductor region, and is not electrically connected to the second semiconductor region.
1. A semiconductor device comprising:
a semiconductor layer having a first plane and a second plane opposite to the first plane, the semiconductor layer including a first-conductivity-type first semiconductor region, a second-conductivity-type second semiconductor region, a first-conductivity-type third semiconductor region, and a second-conductivity-type fourth semiconductor region, the second semiconductor region being provided between the first semiconductor region and the first plane, the third semiconductor region being provided between the second semiconductor region and the first plane, the third semiconductor region having a lower first-conductivity-type impurity concentration than the first semiconductor region, the fourth semiconductor region being provided between the third semiconductor region and the first plane, the fourth semiconductor region having a higher second-conductivity-type impurity concentration than the second semiconductor region;
a first electrode provided on a side of the first plane of the semiconductor layer, the first electrode being electrically connected to the third semiconductor region and the fourth semiconductor region; and
a second electrode provided on a side of the second plane of the semiconductor layer, the second electrode being electrically connected to the first semiconductor region, the second electrode not being electrically connected to the second semiconductor region,
wherein the semiconductor layer further includes a second-conductivity-type fifth semiconductor region provided between the first semiconductor region and the second semiconductor region, the fifth semiconductor region having a higher second-conductivity-type impurity concentration than the second semiconductor region, and
the second-conductivity-type impurity concentration of the fifth semiconductor region is equal to or greater than 1×10 16 cm −3 and equal to or less than 5×10 18 cm −3 .
2. The semiconductor device according to claim 1 ,
wherein a thickness of the fifth semiconductor region in a direction perpendicular to the first plane is less than a thickness of the second semiconductor region in the direction.
3. The semiconductor device according to claim 1 ,
wherein the semiconductor layer has an end surface located between the first plane and the second plane,
the second semiconductor region comes into contact with the end surface,
the second semiconductor region comes into contact with the first plane between the end surface and the third semiconductor region, and
the fifth semiconductor region is separated from the end surface.
4. A semiconductor device comprising:
a semiconductor layer having a first plane and a second plane opposite to the first plane, the semiconductor layer including a first-conductivity-type first semiconductor region, a second-conductivity-type second semiconductor region, a first-conductivity-type third semiconductor region, and a second-conductivity-type fourth semiconductor region, the second semiconductor region being provided between the first semiconductor region and the first plane, the third semiconductor region being provided between the second semiconductor region and the first plane, the third semiconductor region having a lower first-conductivity-type impurity concentration than the first semiconductor region, the fourth semiconductor region being provided between the third semiconductor region and the first plane, the fourth semiconductor region having a higher second-conductivity-type impurity concentration than the second semiconductor region;
a first electrode provided on a side of the first plane of the semiconductor layer, the first electrode being electrically connected to the third semiconductor region and the fourth semiconductor region; and
a second electrode provided on a side of the second plane of the semiconductor layer, the second electrode being electrically connected to the first semiconductor region, the second electrode not being electrically connected to the second semiconductor region,
wherein the semiconductor layer further includes a second-conductivity-type fifth semiconductor region provided between the first semiconductor region and the second semiconductor region, the fifth semiconductor region having a higher second-conductivity-type impurity concentration than the second semiconductor region,
the semiconductor layer has an end surface located between the first plane and the second plane,
the second semiconductor region comes into contact with the end surface,
the second semiconductor region comes into contact with the first plane between the end surface and the third semiconductor region, and
the fifth semiconductor region is separated from the end surface.
5. The semiconductor device according to claim 4 ,
wherein the second semiconductor region is provided between the end surface and the fifth semiconductor region.
6. The semiconductor device according to claim 4 ,
wherein the second-conductivity-type impurity concentration of the fifth semiconductor region is equal to or greater than 1×10 16 cm −3 and equal to or less than 5×10 18 cm −3 .
7. A semiconductor device comprising:
a semiconductor layer having a first plane and a second plane opposite to the first plane, the semiconductor layer including a first-conductivity-type first semiconductor region, a second-conductivity-type second semiconductor region, a first-conductivity-type third semiconductor region, and a second-conductivity-type fourth semiconductor region, the second semiconductor region being provided between the first semiconductor region and the first plane, the third semiconductor region being provided between the second semiconductor region and the first plane, the third semiconductor region having a lower first-conductivity-type impurity concentration than the first semiconductor region, the fourth semiconductor region being provided between the third semiconductor region and the first plane, the fourth semiconductor region having a higher second-conductivity-type impurity concentration than the second semiconductor region;
a first electrode provided on a side of the first plane of the semiconductor layer, the first electrode being electrically connected to the third semiconductor region and the fourth semiconductor region; and
a second electrode provided on a side of the second plane of the semiconductor layer, the second electrode being electrically connected to the first semiconductor region, the second electrode not being electrically connected to the second semiconductor region,
wherein the semiconductor layer further includes a second-conductivity-type fifth semiconductor region provided between the first semiconductor region and the second semiconductor region, the fifth semiconductor region having a higher second-conductivity-type impurity concentration than the second semiconductor region,
the semiconductor layer has an end surface located between the first plane and the second plane,
the second semiconductor region comes into contact with the first plane between the end surface and the third semiconductor region, and
the semiconductor layer further includes a second-conductivity-type sixth semiconductor region provided between the end surface and the second semiconductor region and a first-conductivity-type seventh semiconductor region provided between the end surface and the sixth semiconductor region, the sixth semiconductor region coming into contact with the first plane and the fifth semiconductor region, the seventh semiconductor region coming into contact with the first plane and the first semiconductor region.
8. A semiconductor device comprising:
a semiconductor layer having a first plane and a second plane opposite to the first plane, the semiconductor layer including a first-conductivity-type first semiconductor region, a second-conductivity-type second semiconductor region, a first-conductivity-type third semiconductor region, and a second-conductivity-type fourth semiconductor region, the second semiconductor region being provided between the first semiconductor region and the first plane, the third semiconductor region being provided between the second semiconductor region and the first plane, the third semiconductor region having a lower first-conductivity-type impurity concentration than the first semiconductor region, the fourth semiconductor region being provided between the third semiconductor region and the first plane, the fourth semiconductor region having a higher second-conductivity-type impurity concentration than the second semiconductor region;
a first electrode provided on a side of the first plane of the semiconductor layer, the first electrode being electrically connected to the third semiconductor region and the fourth semiconductor region; and
a second electrode provided on a side of the second plane of the semiconductor layer, the second electrode being electrically connected to the first semiconductor region, the second electrode not being electrically connected to the second semiconductor region,
wherein the semiconductor layer further includes a second-conductivity-type fifth semiconductor region provided between the first semiconductor region and the second semiconductor region, the fifth semiconductor region having a higher second-conductivity-type impurity concentration than the second semiconductor region,
the semiconductor layer has an end surface located between the first plane and the second plane,
the second semiconductor region comes into contact with the first plane between the end surface and the third semiconductor region, and
the semiconductor layer further includes an insulator provided between the end surface and the fifth semiconductor region.
9. A semiconductor device comprising:
a semiconductor layer having a first plane and a second plane opposite to the first plane, the semiconductor layer including a first-conductivity-type first semiconductor region, a second-conductivity-type second semiconductor region, a first-conductivity-type third semiconductor region, and a second-conductivity-type fourth semiconductor region, the second semiconductor region being provided between the first semiconductor region and the first plane, the third semiconductor region being provided between the second semiconductor region and the first plane, the third semiconductor region having a lower first-conductivity-type impurity concentration than the first semiconductor region, the fourth semiconductor region being provided between the third semiconductor region and the first plane, the fourth semiconductor region having a higher second-conductivity-type impurity concentration than the second semiconductor region;
a first electrode provided on a side of the first plane of the semiconductor layer, the first electrode being electrically connected to the third semiconductor region and the fourth semiconductor region; and
a second electrode provided on a side of the second plane of the semiconductor layer, the second electrode being electrically connected to the first semiconductor region, the second electrode not being electrically connected to the second semiconductor region,
wherein the semiconductor layer further includes a first-conductivity-type eighth semiconductor region provided between the third semiconductor region and the first plane, the eighth semiconductor region having a higher first-conductivity-type impurity concentration than the third semiconductor region, the eighth semiconductor region being electrically connected to the first electrode.