Electronic circuit
According to one embodiment, an electronic circuit includes a first delay element, a second delay element, a first hold circuit and a quantization circuit. The first delay element obtains a first signal by delaying a first pulse signal. The second delay element obtains a second signal by delaying the first signal. The first hold circuit holds a first voltage of an input signal corresponding to the first signal. The second hold circuit holds a second voltage of the input signal corresponding to the second signal. The quantization circuit obtains a third signal and a fourth signal each with different rising times based on a second pulse signal, to quantize the first voltage based on the third signal, and to quantize the second voltage based on the fourth signal.
1. An electronic circuit comprising:
a first delay element to obtain a first signal by delaying a first pulse signal;
a second delay element to obtain a second signal by delaying the first signal;
a first hold circuit to hold a first voltage of an input signal corresponding to the first signal;
a second hold circuit to hold a second voltage of the input signal corresponding to the second signal;
a quantization circuit to obtain a third signal and a fourth signal each with different rising times based on a second pulse signal, to quantize the first voltage based on the third signal, and to quantize the second voltage based on the fourth signal;
a first switch connected to the first hold circuit and the quantization circuit, and to switch according to the third signal; and
a second switch connected the second hold circuit and the quantization circuit, and to switch according to the fourth signal, wherein
the quantization circuit quantizes the first voltage according to a switching of the first switch and quantizes the second voltage according to a switching of the second switch, wherein
the quantization circuit includes a shift register and an analog-to-digital converter,
the shift register obtains the third signal and the fourth signal by delaying the second pulse signal according to a clock signal, provides the third signal to the first switch and provides the fourth signal to the second switch, and
the analog-to-digital converter is connected to the first switch and the second switch.
2. The electronic circuit according to claim 1 , wherein
the quantization circuit includes a shift register, a first comparator, a second comparator and a conversion circuit,
the shift register obtains the third signal and the fourth signal by delaying the second pulse signal according to a clock signal, provides the third signal to the first switch and provides the fourth signal to the second switch,
the first comparator is connected to the first switch and the second switch, and compares the first voltage and the second voltage with a first reference voltage,
the second comparator is connected to the first switch and the second switch, and compares the first voltage and the second voltage with a second reference voltage and
the conversion circuit digitalizes and outputs the first voltage and the second voltage based on at least either comparison of the first voltage at the first comparator, comparison of the second voltage at the first comparator, comparison of the first voltage at the second comparator and comparison of the second voltage at the second comparator.
3. The electronic circuit according to claim 2 , wherein
the quantization circuit further includes a first amplifier and a second amplifier, wherein
the first amplifier amplifies the first voltage, the second voltage and the first reference voltage and provides the first voltage, the second voltage and the first reference voltage to the first comparator, and
the second amplifier amplifies the first voltage, the second voltage and the second reference voltage and provides the first voltage, the second voltage and the second reference voltage to the second comparator.
4. The electronic circuit according to claim 1 , wherein
the quantization circuit includes a third delay element, a fourth delay element, a first comparator, a second comparator and a conversion circuit, wherein
the third delay element obtains the third signal by delaying the second pulse signal,
the fourth delay element obtains the fourth signal by delaying the third signal,
the first comparator is connected to the first switch and the second switch, and compares the first voltage and the second voltage with a first reference voltage,
the second comparator is connected to the first switch and the second switch, and compares the first voltage and the second voltage with a second reference voltage, and
the conversion circuit digitalizes and outputs the first voltage and the second voltage based on at least either comparison of the first voltage at the first comparator, comparison of the second voltage at the first comparator, comparison of the first voltage at the second comparator and comparison of the second voltage at the second comparator, wherein
the third signal is provided to the first switch from the third delay element and the fourth signal is provided to the second switch from the fourth delay element.
5. The electronic circuit according to claim 1 , further comprising
a semiconductor device provide the input signal; and
a second control circuit connected to the semiconductor device and the shift register, wherein
the second control circuit determines an applied voltage of the semiconductor device, determines a first timing when the shift register provides the third signal and determines a second timing when the shift register provides the fourth signal.
6. The electronic circuit according to claim 5 , further comprising
a detection circuit to detect ringing in the applied voltage, wherein
the second control circuit determines the first timing and the second timing based on a notification regarding the detected ringing transmitted from the detection circuit.
7. The electronic circuit according to claim 1 , further comprising
a semiconductor device to provide the input signal;
an input terminal where the signal is input;
a first capacitor connected between the semiconductor device and the input terminal;
a second capacitor connected between the first capacitor and a ground;
a third switch connected between a power supply potential and the input terminal; and
a fourth switch connected between the input terminal and the ground.
8. The electronic circuit according to claim 1 , further comprising
a semiconductor device to provide the input signal;
a signal generator to generate a fifth signal to change an applied voltage of the semiconductor device;
a third comparator to compare the input signal and a reference potential; and
a third control circuit connected to the signal generator and the third comparator, wherein
the first delay elements is variable delay element, and
the third control circuit determines a delay amount in the variable delay element based on a time difference between when the signal generator changed the applied voltage to when an output voltage of the third comparator changes.
9. The electronic circuit according to claim 1 , further comprising
a semiconductor device;
a first resistor connected to the semiconductor device and a ground;
a second resistor connected to the first resistor;
a third amplifier connected to the second resistor and a reference potential and to provide the input signal; and
a third resistor connected between a first node and a second node, wherein the first node is located between the second resistor and the third amplifier, and the second node is located between a second amplifier and the input terminal.
10. The electronic circuit according to claim 1 , wherein
the quantization circuit includes at least one first comparator, the first comparator including:
a latch circuit including a first inverter and a second inverter;
a differential pair to drive the first inverter and the second inverter in the latch circuit by a current based on a comparison of two voltages entered to the differential pair;
a third switch to switch an operation status of the differential pair;
a fourth resistor connected between the third switch and a reference potential,
the latch circuit connected between a power supply potential and the differential pair, and
an input terminal of the first inverter is connected to an output terminal and an output terminal of the first inverter is connected to an input terminal.
11. The electronic circuit according to claim 1 , wherein
the first signal, the second signal and the third signal rises in different timings, respectively.
12. The electronic circuit according to claim 1 , wherein
the first signal rises earlier than the third signal.
13. The electronic circuit according to claim 1 , wherein
a pulse width of the second signal is greater than a pulse width of the first signal.
14. The electronic circuit according to claim 1 , further comprising:
a first control circuit configured to determine delay amounts of the first delay element and the second delay element which are variable delay elements.
15. An electronic circuit comprising:
a first delay element to obtain a first signal by delaying a first pulse signal;
a second delay element to obtain a second signal by delaying the first signal;
a first hold circuit to hold a first voltage of an input signal corresponding to the first signal;
a second hold circuit to hold a second voltage of the input signal corresponding to the second signal; and
a quantization circuit to obtain a third signal and a fourth signal each with different rising times based on a second pulse signal, to quantize the first voltage based on the third signal, and to quantize the second voltage based on the fourth signal,
the quantization circuit includes at least one first comparator, the first comparator including:
a latch circuit including a first inverter and a second inverter;
a differential pair to drive the first inverter and the second inverter in the latch circuit by a current based on a comparison of two voltages entered to the differential pair;
a third switch to switch an operation status of the differential pair;
a fourth resistor connected between the third switch and a reference potential,
the latch circuit connected between a power supply potential and the differential pair, and
an input terminal of the first inverter is connected to an output terminal and an output terminal of the first inverter is connected to an input terminal.
16. The electronic circuit according to claim 15 , further comprising:
a first switch connected to the first hold circuit and the quantization circuit, and to switch according to the third signal; and
a second switch connected the second hold circuit and the quantization circuit, and to switch according to the fourth signal, wherein
the quantization circuit quantizes the first voltage according to a switching of the first switch and quantizes the second voltage according to a switching of the second switch,
the quantization circuit includes a shift register, a first comparator, a second comparator and a conversion circuit,
the shift register obtains the third signal and the fourth signal by delaying the second pulse signal according to a clock signal, provides the third signal to the first switch and provides the fourth signal to the second switch,
the first comparator is connected to the first switch and the second switch, and compares the first voltage and the second voltage with a first reference voltage,
the second comparator is connected to the first switch and the second switch, and compares the first voltage and the second voltage with a second reference voltage and
the conversion circuit digitalizes and outputs the first voltage and the second voltage based on at least either comparison of the first voltage at the first comparator, comparison of the second voltage at the first comparator, comparison of the first voltage at the second comparator and comparison of the second voltage at the second comparator.
17. The electronic circuit according to claim 15 , further comprising:
a first switch connected to the first hold circuit and the quantization circuit, and to switch according to the third signal; and
a second switch connected the second hold circuit and the quantization circuit, and to switch according to the fourth signal, wherein
the quantization circuit quantizes the first voltage according to a switching of the first switch and quantizes the second voltage according to a switching of the second switch,
the quantization circuit includes a third delay element, a fourth delay element, a first comparator, a second comparator and a conversion circuit, wherein
the third delay element obtains the third signal by delaying the second pulse signal,
the fourth delay element obtains the fourth signal by delaying the third signal,
the first comparator is connected to the first switch and the second switch, and compares the first voltage and the second voltage with a first reference voltage,
the second comparator is connected to the first switch and the second switch, and compares the first voltage and the second voltage with a second reference voltage, and
the conversion circuit digitalizes and outputs the first voltage and the second voltage based on at least either comparison of the first voltage at the first comparator, comparison of the second voltage at the first comparator, comparison of the first voltage at the second comparator and comparison of the second voltage at the second comparator, wherein
the third signal is provided to the first switch from the third delay element and the fourth signal is provided to the second switch from the fourth delay element.
18. The electronic circuit according to claim 15 , further comprising:
a semiconductor device to provide the input signal;
an input terminal where the signal is input;
a first capacitor connected between the semiconductor device and the input terminal;
a second capacitor connected between the first capacitor and a ground;
a third switch connected between a power supply potential and the input terminal; and
a fourth switch connected between the input terminal and the ground.
19. The electronic circuit according to claim 15 , further comprising:
a semiconductor device to provide the input signal;
a signal generator to generate a fifth signal to change an applied voltage of the semiconductor device;
a third comparator to compare the input signal and a reference potential; and
a third control circuit connected to the signal generator and the third comparator, wherein
the first delay elements is variable delay element, and
the third control circuit determines a delay amount in the variable delay element based on a time difference between when the signal generator changed the applied voltage to when an output voltage of the third comparator changes.
20. The electronic circuit according to claim 15 , further comprising:
a semiconductor device;
a first resistor connected to the semiconductor device and a ground;
a second resistor connected to the first resistor;
a third amplifier connected to the second resistor and a reference potential and to provide the input signal; and
a third resistor connected between a first node and a second node, wherein the first node is located between the second resistor and the third amplifier, and the second node is located between a second amplifier and the input terminal.