IP Library Granted Patent US 10,999,005
Granted Patent B2
US 10,999,005 · App. 16/879,769 · Granted May 4, 2021

Method and device for polar code rate matching

Inventors: Chen Xu (Hangzhou, CN); Gongzheng Zhang (Hangzhou, CN); Rong Li (Hangzhou, CN); Huazi Zhang (Hangzhou, CN); Lingchen Huang (Hangzhou, CN)
Assignee: HUAWEI TECHNOLOGIES CO., LTD.
H04L1/0043H04L1/0068H04L1/0071H04L1/0072H04L67/2842H04W72/1231
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Quick Facts
Patent No.
US 10,999,005
App. No.
16/879,769
Granted
May 4, 2021
Kind
B2
Abstract

Embodiments of the application provide a method and device for polar code rate matching in a wireless communication network. A device of the network obtains K information bits. The device generates a to-be-encoded sequence having a length N bits. The to-be-encoded sequence includes the K information bits and L frozen bits. The L frozen bits are placed in L bit positions of the to-be-encoded sequence. The L bit positions are determined according to a rate match manner which is either puncturing or shortening. The device polar encodes the to-be-encoded sequence to obtain the encoded sequence. The device interleaves the encoded sequence to obtain an interleaved sequence and then stores the interleaved sequence into a cyclic cache. The device sequentially outputs M bits of the interleaved sequence from the cyclic cache according to the rate matching manner.

Claims (49)

1. A method for use by a communication device, comprising:

receiving K information bits, wherein K≥1;

polar encoding the K information bits to obtain an encoded bit sequence, wherein the encoded bit sequence has N bits, and N is an integer power of 2;

interleaving the encoded bit sequence, to obtain an interleaved bit sequence;

sequentially storing the interleaved bit sequence into a cyclic cache; and

sequentially outputting M bits of the interleaved bit sequence from the cyclic cache according to a rate matching manner, wherein M is a positive integer;

wherein the rate matching manner is one of shortening, puncturing and repetition; and when the rate matching manner is shortening, a first bit to an M th bit of the interleaved bit sequence are output from the cyclic cache, wherein M<N.

2. The method according to claim 1 , wherein M is a target code length of the output sequence, and M is determined by a bit rate R according to:

M=INT(K/R);

wherein INT( ) indicates rounding up or rounding down.

3. A device in a wireless communication network, comprising a processor, a cyclic cache, and a memory storing program instructions for execution by the processor;

wherein when executed by the processor, the program instructions cause the device to:

receive K information bits, wherein K≥1;

polar encode the K information bits to obtain an encoded bit sequence, wherein the encoded bit sequence has N bits, and N is an integer power of 2;

interleave the encoded bit sequence, to obtain an interleaved bit sequence;

sequentially store the interleaved bit sequence into the cyclic cache; and

sequentially output M bits of the interleaved bit sequence from the cyclic cache according to a rate matching manner, wherein M is a positive integer;

wherein the rate matching manner is one of shortening, puncturing and repetition; and when the rate matching manner is shortening, a first bit to an M th bit of the interleaved bit sequence are output from the cyclic cache, wherein M<N.

4. The device according to claim 3 , wherein M is a target code length of the output sequence, and M is determined by a bit rate R according to:

M=INT(K/R);

wherein INT( ) indicates rounding up or rounding down.

5. The method according to claim 1 , wherein polar encoding the K information bits to obtain the encoded bit sequence comprises:

generating a binary row vector u 1 N , wherein u 1 N =(u 1 , u 2 , . . . , u N ), and K bit-positions of the binary row vector u 1 N are occupied by the K information bits; and

encoding the binary row vector u 1 N according an encoding formula, to obtain the encoded bit sequence;

wherein the encoding formula is:

x 1 N =u 1 N G N,

wherein x 1 N =(x 1 , x 2 , . . . , x N ) is the encoded bit sequence, and G N is a polar code generating matrix of N row and N columns.

6. The device according to claim 3 , wherein in polar encoding the to-be-encoded sequence to obtain the encoded sequence, by executing the program instructions, the processor is configured to:

generate a binary row vector u 1 N =(u 1 , u 2 , . . . , u N ), wherein the binary row vector corresponds to the to be encoded sequence; and

encode the binary row vector u 1 N according an encoding formula, to obtain the encoded bit sequence;

wherein the encoding formula is:

x 1 N =u 1 N G N,

wherein x=(x 1 , x 2 , . . . , x N ) is the encoded bit sequence, and G N is a polar code generating matrix of N rows and N columns.

7. A non-transitory computer readable medium storing program codes thereon for execution by a processor in a communication device, wherein when executed by the processor, the program codes cause the device to:

receive K information bits, wherein K≥1;

polar encode the K information bits to obtain an encoded bit sequence, wherein the encoded bit sequence has N bits, and N is an integer power of 2;

interleave the encoded bit sequence, to obtain an interleaved bit sequence;

sequentially store the interleaved bit sequence into the cyclic cache; and

sequentially output M bits of the interleaved bit sequence from the cyclic cache according to a rate matching manner, wherein M is a positive integer;

wherein the rate matching manner is one of shortening, puncturing and repetition; and when the rate matching manner is shortening, a first bit to an M th bit of the interleaved bit sequence are output from the cyclic cache, wherein M<N.

8. The non-transitory computer readable medium according to claim 7 , wherein M is a target code length of the output sequence, and M is determined by a bit rate R according to:

M=INT(K/R);

wherein INT( ) indicates rounding up or rounding down.

9. The non-transitory computer readable medium according to claim 7 , wherein in polar encoding the K information bits, the program codes, when executed by the processor, cause the device to:

generate a binary row vector u 1 N , wherein u 1 N =(u 1 , u 2 , . . . , u N ), and K bit-positions of the binary row vector ui are occupied by the K information bits; and

encode the binary row vector u 1 N according an encoding formula, to obtain the encoded bit sequence;

wherein the encoding formula is:

x 1 N =u 1 N G N,

wherein x 1 N =(x 1 , x 2 , . . . , x N ) is the encoded bit sequence, and G N is a polar code generating matrix of N rows and N columns.

Priority Claims (1)
CN 201710184083.8 · Mar 24, 2017 · national
Continuity (4)
Continuation 16423197 · May 28, 2019
Continuation 16214147 · Dec 10, 2018
Continuation PCTCN2018079947 · Mar 22, 2018
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