IP Library › Granted Patent US 11,004,956
Granted Patent B2
US 11,004,956 · App. 16/685,941 · Granted May 11, 2021

Manufacturing method of semiconductor device

Inventor: Jin Ha Kim (Icheon, KR)
Assignee: SK hynix Inc.
H01L29/66666H01L21/02057H01L21/02532H01L21/02592H01L21/02667H01L21/30604H01L27/11273H01L27/11556H01L27/11582H01L27/2454
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,004,956
App. No.
16/685,941
Granted
May 11, 2021
Kind
B2
Abstract

A method of manufacturing a semiconductor device includes forming a stacked structure, forming an opening in the stacked structure, forming a preliminary channel layer in the opening, forming a channel layer by performing heat treatment on the preliminary channel layer, etching an inner surface of the channel layer, and performing ozone (O 3 ) treatment on an etched inner surface of the channel layer.

Claims (29)

1. A method of manufacturing a semiconductor device, the method comprising:

forming a stacked structure;

forming an opening in the stacked structure;

forming a preliminary channel layer in the opening;

forming a channel layer by performing heat treatment on the preliminary channel layer;

etching an inner surface of the channel layer; and

performing ozone (O 3 ) treatment on an etched inner surface of the channel layer.

2. The method of claim 1 , wherein the preliminary channel layer includes an amorphous silicon layer and the channel layer includes a polysilicon layer.

3. The method of claim 2 , wherein the amorphous silicon layer is crystallized to form the polysilicon layer and a grain size of the polysilicon layer is increased, by the heat treatment.

4. The method of claim 1 , wherein the etched inner surface includes a defect and the defect is cured by the O 3 treatment.

5. The method of claim 1 , wherein the inner surface of the channel layer is etched using a wet etch process.

6. The method of claim 1 , wherein the inner surface of the channel layer is etched using an isotropic etch process.

7. The method of claim 1 , wherein the O 3 treatment is performed using O 3 plasma.

8. The method of claim 1 , wherein the O 3 treatment is performed using O 3 water.

9. The method of claim 1 , wherein the O 3 treatment is performed by exposing the channel layer to O 3 gas.

10. The method of claim 1 , further comprising forming a memory layer in the opening before forming the preliminary channel layer.

11. The method of claim 1 , further comprising forming a gap-filling insulating layer in a hole defined by the channel layer subjected to the O 3 treatment.

12. The method of claim 1 , wherein the stacked structure includes first material layers and second material layers stacked alternately with each other.

13. A method of manufacturing a semiconductor device, the method comprising:

depositing an amorphous silicon layer on a dielectric layer;

forming a polysilicon layer by performing heat treatment on the amorphous silicon layer;

etching the polysilicon layer to reduce a thickness of the polysilicon layer; and

performing O 3 treatment on an etched surface of the polysilicon layer.

14. The method of claim 13 , wherein the amorphous silicon layer is crystallized to form the polysilicon layer and a grain size of the polysilicon layer is increased, by the heat treatment.

15. The method of claim 13 , wherein the etched surface includes a defect and the defect is cured by the O 3 treatment.

16. The method of claim 13 , wherein the O 3 treatment is performed using O 3 plasma.

17. The method of claim 13 , wherein the O 3 treatment is performed using O 3 water.

18. The method of claim 13 , wherein the O 3 treatment is performed by exposing the etched surface to O 3 gas.

19. The method of claim 13 , further comprising forming an insulating layer on the etched surface subjected to the O 3 treatment.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 18, 2019
From: KIM, JIN HA
To: SK HYNIX INC.
Reel/Frame 051036/0070 →
Priority Claims (1)
KR 10-2019-0057766 · May 17, 2019 · national
Continuity (1)
Related Publication 20200365713A1 · Nov 19, 2020