IP Library › Granted Patent US 11,011,663
Granted Patent B2
US 11,011,663 · App. 16/589,475 · Granted May 18, 2021

Semiconductor element for oscillating or detecting terahertz wave and manufacturing method of semiconductor element

Inventors: Yasushi Koyama (Kamakura, JP); Jun Iba (Yokohama, JP)
Assignee: Canon Kabushiki Kaisha
H01L31/101H01L31/02161H01L31/022408H01L31/035272H01L31/1844H01Q9/0407H01S5/0425H01L31/03046H01L31/035236H01S5/3402
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Quick Facts
Patent No.
US 11,011,663
App. No.
16/589,475
Granted
May 18, 2021
Kind
B2
Abstract

A semiconductor element which oscillates or detects a terahertz wave, the semiconductor element comprising: a first electrode; a semiconductor layer having a gain of the terahertz wave; a second electrode which forms a mesa structure together with the semiconductor layer; a third electrode; a fourth electrode; a first dielectric layer which is in contact with the third electrode and which surrounds the mesa structure; and a second dielectric layer which is arranged between the first electrode and the fourth electrode, which surrounds the third electrode, and which is made of a different material from the first dielectric layer, wherein the first electrode, the semiconductor layer, the second electrode, the third electrode, and the fourth electrode are stacked in this order from a side of the substrate in a direction perpendicular to the substrate, and a predetermined mathematical expression is satisfied.

Claims (26)

1. A semiconductor element which oscillates or detects a terahertz wave, the semiconductor element comprising:

a first electrode;

a semiconductor layer that is a gain medium at a wavelength of the terahertz wave;

a second electrode which is connected to the semiconductor layer and which forms a mesa structure together with the semiconductor layer;

a third electrode electrically connected to the semiconductor layer;

a fourth electrode connected to the third electrode;

a first dielectric layer which is in contact with the third electrode and which surrounds the mesa structure; and

a second dielectric layer which is arranged between the first electrode and the fourth electrode, which surrounds the third electrode, and which is made of a different material from the first dielectric layer, wherein

the first electrode, the semiconductor layer, the second electrode, the third electrode, and the fourth electrode are stacked in this order on a side of a substrate in a direction perpendicular to the side of the substrate, and

if a direction parallel to the side of the substrate is defined as an in-plane direction, the following mathematical expression is satisfied

d 0 ≤d 2 ≤d 1 , where

d 0 : length in the in-plane direction of the semiconductor layer,

d 1 : length in the in-plane direction of a first surface, which is a surface of the first dielectric layer that is in contact with the third electrode, and

d 2 : length in the in-plane direction of a second surface, which is a surface of the third electrode that is in contact with the first dielectric layer.

2. The semiconductor element according to claim 1 , wherein a distance between the first electrode and the third electrode is longer than a length of the mesa structure in the direction perpendicular to the side of the substrate.

3. The semiconductor element according to claim 1 , further comprising a post structure which is a layer made of a semiconductor or a metal and which is to be connected to the mesa structure, the post structure being arranged between the mesa structure and the substrate, wherein

a distance between the post structure and the third electrode is longer than a length of the mesa structure in the direction perpendicular to the side of the substrate.

4. The semiconductor element according to claim 1 , wherein a length of the second dielectric layer in the direction perpendicular to the side of the substrate is longer than a distance between the first electrode and the third electrode.

5. The semiconductor element according to claim 1 , wherein the first dielectric layer surrounds a stack in which (1) the semiconductor layer, (2) the second electrode, and (3) a fifth electrode which is arranged between the second electrode and the third electrode and which is connected to the third electrode and the second electrode are stacked in this order on the side of the substrate in a direction perpendicular to the side of the substrate.

6. The semiconductor element according to claim 5 , wherein a length in the in-plane direction of a connecting portion between the fifth electrode and the second electrode is shorter than a length in the in-plane direction of the semiconductor layer.

7. The semiconductor element according to claim 1 , wherein the second electrode is an electrode that is ohmically connected to the semiconductor layer.

8. The semiconductor element according to claim 1 , wherein the second dielectric layer has lower relative permittivity than the first dielectric layer.

9. The semiconductor element according to claim 1 , wherein the first dielectric layer is made of an inorganic material.

10. The semiconductor element according to claim 1 , wherein the second dielectric layer is made of an organic material.

11. The semiconductor element according to claim 1 , wherein the semiconductor layer includes a resonant tunneling diode.

12. The semiconductor element according to claim 1 , comprising a patch antenna.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 26, 2019
From: KOYAMA, YASUSHI; IBA, JUN
To: CANON KABUSHIKI KAISHA
Reel/Frame 051373/0548 →
Priority Claims (1)
JP JP2018-189244 · Oct 4, 2018 · national
Continuity (1)
Related Publication 20200111929A1 · Apr 9, 2020
Cited By (1)
US 12,690,205