IP Library › Granted Patent US 11,014,336
Granted Patent B2
US 11,014,336 · App. 16/644,648 · Granted May 25, 2021

Circuit board and method for manufacturing the same

Inventors: Takeshi Okunaga (Osaka, JP); Miyuki Kobayashi (Osaka, JP); Tatsuya Tamaki (Osaka, JP); Kenpei Yamasaki (Osaka, JP); Tomoki Hayashi (Osaka, JP)
Assignee: NIPPON PILLAR PACKING CO., LTD.
B32B15/095B32B27/12H05K1/036B32B2457/08
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,014,336
App. No.
16/644,648
Granted
May 25, 2021
Kind
B2
Abstract

A circuit board according to the present invention includes: a first layer containing a fiber base material, and fusible fluororesin with which the fiber base material is impregnated; and second layers containing non-fusible fluororesin that are arranged on the two surfaces of the first layer.

Claims (16)

1. A circuit board comprising:

a first layer containing a fiber base material, and fusible fluororesin with which the fiber base material is impregnated; and

second layers containing non-fusible fluororesin that are arranged on two surfaces of the first layer.

2. The circuit board according to claim 1 , wherein the fluororesin included in the second layers contains inorganic fine particles.

3. The circuit board according to claim 2 , further comprising third layers containing non-fusible fluororesin that cover the second layers.

4. The circuit board according to claim 1 , wherein tetrafluoroethylene-perfluoroalkoxyethylene copolymer resin (PFA), tetrafluoroethylene-hexafluoropropylene copolymer (FEP), tetrafluoroethylene-ethylene copolymer (ETFE), vinylidene fluoride resin (PVDF), chlorotrifluoroethylene resin (CTFE), or a combination thereof is used as the fusible fluororesin.

5. The circuit board according to claim 1 , wherein polytetrafluoroethylene (PTFE) is used as the non-fusible fluororesin.

6. The circuit board according to claim 1 ,

wherein the fluororesin included in the second layers contains inorganic fine particles, and

a mixing ratio between the fluororesin and the inorganic fine particles included in the second layer is 5:5 to 3:7 when expressed as a volume ratio.

7. A method for manufacturing a circuit board, comprising:

forming a first layer by impregnating a fiber base material with a dispersion liquid of fusible fluororesin and heating the fiber base material at a temperature lower than the melting point of the fusible fluororesin; and

forming second layers containing non-fusible fluororesin on two surfaces of the first layer.

8. The method for manufacturing a circuit board according to claim 7 , wherein the fluororesin included in the second layers contains inorganic fine particles.

9. The method for manufacturing a circuit board according to claim 8 , wherein a mixing ratio between the fluororesin and the inorganic fine particles included in the second layer is 5:5 to 3:7 when expressed as a volume ratio.

10. The method for manufacturing a circuit board according to claim 8 , the method further comprising forming third layers containing non-fusible fluororesin that cover the second layers.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 5, 2020
From: OKUNAGA, TAKESHI; KOBAYASHI, MIYUKI; TAMAKI, TATSUYA; YAMASAKI, KENPEI; HAYASHI, TOMOKI
To: NIPPON PILLAR PACKING CO., LTD.
Reel/Frame 052031/0607 →
Priority Claims (1)
JP JP2017-171348 · Sep 6, 2017 · national
Continuity (1)
Related Publication 20210060902A1 · Mar 4, 2021
Cited By (1)
US 12,336,096