Electronic apparatus and method of managing read levels of flash memory

1. An electronic apparatus comprising:

flash memory configured to store a recently programmed read level and a default read level; and

a flash controller coupled to the flash memory, configured to manage data access to the flash memory, and comprising:

a timer, configured to generate clock interrupts;

memory configured to retain for a predetermined period of time a list of entries, the entries being of data having been programmed into the flash memory; and

a microcontroller, coupled to the timer and the memory, and configured to write, upon each clock interrupt, an entry into the memory to update the list of entries, read from the memory the list of entries prior to reading data from the flash memory, and when the data matches an entry in the list of entries, transmit to the flash memory a recently programmed read command indicating that the data being read is recently programmed data, the entry being of data updated into the flash memory;

wherein the recently programmed read command is transmitted before a read command, and the read command is used to instruct the flash memory to fetch data therein; and

the flash memory is configured to read data using the recently programmed read level when receiving the recently programmed read command and the read command, and read data using the default read level when receiving the read command and not the recently programmed read command.

2. The electronic apparatus of claim 1 , wherein the flash memory comprises a multiplexer coupled to the flash controller, and is configured to select between the recently programmed read level and the default read level according to the recently programmed read command.

3. The electronic apparatus of claim 1 , wherein the recently programmed read level exceeds the default read level.

4. The electronic apparatus of claim 1 , wherein the microcontroller is further configured to reset a program order tag, and when the program order tag is less than a target retention count, associate the program order tag with the entry and increment the program order tag upon each clock interrupt.

5. The electronic apparatus of claim 4 , wherein when the program order tag is equal to the target retention count, the microcontroller is further configured to associate the program order tag with the entry and reset the program order tag upon a clock interrupt.

6. The electronic apparatus of claim 1 , wherein each entry in the list of entries comprises a logical unit number address, a block address, a start page address, and an end page address corresponding to one piece of data in the flash memory.

7. The electronic apparatus of claim 1 , wherein the flash controller further comprises a direct memory access (DMA) controller coupled between the microcontroller and the memory and configured to pass entries of data between the microcontroller and the memory.

8. A method of managing read levels of flash memory, adopted by an electronic apparatus comprising the flash memory and a flash controller coupled thereto, the flash controller comprising a timer, memory and a microcontroller, the method comprising:

the flash memory storing a recently programmed read level and a default read level;

the timer generating clock interrupts;

the memory retaining for a predetermined period of time a list of entries, the entries being of data having been programmed into the flash memory;

upon each clock interrupt, the microcontroller writing an entry into the memory to update the list of entries, the entry being of data updated into the flash memory;

the microcontroller reading from the memory the list of entries prior to reading data from the flash memory;

when the data matches an entry in the list of entries, the microcontroller transmitting to the flash memory a recently programmed read command indicating that the data being read is recently programmed data, wherein the recently programmed read command is transmitted before a read command, and the read command is used to instruct the flash memory to fetch data therein;

the flash memory reading data using the recently programmed read level when receiving the read command and the recently programmed read command; and

the flash memory reading data using the default read level when receiving the read command and not the recently programmed read command.

9. The method of claim 8 , wherein the flash memory comprises a multiplexer coupled to the flash controller, and the method further comprises the multiplexer selecting between the recently programmed read level and the default read level according to the recently programmed read command.

10. The method of claim 8 , wherein the recently programmed read level exceeds the default read level.

11. The method of claim 8 , further comprising:

the microcontroller resetting a program order tag; and

when the program order tag is less than a target retention count, the microcontroller associating the program order tag with the entry and incrementing the program order tag upon each clock interrupt.

12. The method of claim 11 , further comprising:

when the program order tag is equal to the target retention count, the microcontroller associating the program order tag with the entry and resetting the program order tag upon a clock interrupt.

13. The method of claim 8 , wherein each entry in the list of entry comprises a logical unit number address, a start page address, and an end page address of corresponding data in the flash memory.

14. The method of claim 8 , wherein the flash controller further comprises a direct memory access (DMA) controller coupled between the microcontroller and the memory and the method further comprises the DMA controller passing entries of data in the list between the microcontroller and the memory.