IP Library Granted Patent US 11,022,650
Granted Patent B2
US 11,022,650 · App. 16/157,432 · Granted Jun 1, 2021

Capacitive switch controller

Inventors: Yukihiro Iwamoto (Kyoto, JP); Masaya Hirakawa (Kyoto, JP)
Assignee: ROHM CO., LTD.
G01R31/3277G01R27/2605G01R31/005G01R31/2829H02H1/0007H03K17/962H03K17/9622H02H3/00H03K2217/94026
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Quick Facts
Patent No.
US 11,022,650
App. No.
16/157,432
Granted
Jun 1, 2021
Kind
B2
Abstract

A controller controls a plurality of sensor electrodes. To a plurality of sense pins, the plurality of sensor electrodes are connected. A plurality of capacitance detection circuits respectively measure capacitance values of the corresponding sense pins. A calibration circuit calibrates the plurality of capacitance detection circuits. A relative relationship among the respective capacitance values of the plurality of sense pins is used for abnormality detection.

Claims (37)

1. A capacitive switch controller comprising:

a plurality of sense pins to be coupled to a plurality of sensor electrodes;

a plurality of capacitance detection circuits structured to respectively measure capacitance values of the corresponding sense pins;

a calibration circuit structured to calibrate the plurality of capacitance detection circuits; and

an abnormality detection circuit structured to obtain a relative relationship among the capacitance values of the plurality of sense pins,

wherein the abnormality detection circuit is structured to obtain an order of the capacitance values of the plurality of sense pins.

2. The capacitive switch controller according to claim 1 , wherein the abnormality detection circuit is structured to detect an abnormality based on a comparison result between the obtained relative relationship and an expected value for the relative relationship.

3. The capacitive switch controller according to claim 2 , wherein the expected value for the relative relationship is received from a host controller.

4. The capacitive switch controller according to claim 3 , wherein the abnormality detection circuit is structured to interrupt the host controller in response to the detection of the abnormality.

5. The capacitive switch controller according to claim 3 , wherein, the abnormality detection circuit is structured to stop measurement of the capacitance values of all of the sense pins in response to the detection of the abnormality.

6. The capacitive switch controller according to claim 3 , wherein the abnormality detection circuit is structured to stop measurement of the capacitance value of the sense pin from which the abnormality is detected.

7. The capacitive switch controller according to claim 1 , wherein the relative relationship obtained by the abnormality detection circuit is to be transmitted to a host controller.

8. The capacitive switch controller according to claim 1 , wherein determining the relative relationship comprises:

selecting one reference pin to be calibrated from the plurality of sense pins;

calibrating one of the plurality of capacitance detection circuits corresponding to the reference pin so as to generate a calibration result;

applying the calibration result to all of the plurality of capacitance detection circuits;

measuring each capacitance value of respective ones of the plurality of sense pins;

determining relative relationships between the reference pin and respective other sense pins of the plurality of sense pins.

9. The capacitive switch controller according to claim 8 , wherein the determining the relative relationship is repeated such that the plurality of sense pins are sequentially selected as the reference pin one by one.

10. The capacitive switch controller according to claim 8 , wherein, in a case in which the measured capacitance value of one of the sense pins exceeds an upper limit of a measurement range, the abnormality detection circuit determines the capacitance value of the sense pin to be higher than the capacitance value of the reference pin, and in a case in which the measured capacitance value of the sense pin falls below a lower limit of the measurement range, the abnormality detection circuit determines the capacitance value of the sense pin to be lower than the capacitance value of the reference pin.

11. The capacitive switch controller according to claim 1 , wherein the capacitance detection circuit includes a variable circuit element, and

wherein the calibration circuit is structured to control a characteristic of the variable circuit element so that a measured capacitance value of each of the sense pins may approximate a reference value.

12. The capacitive switch controller according to claim 11 , wherein the abnormality detection circuit is structured to detect an abnormality based on a relative relationship among the controlled characteristics of the variable circuit elements.

13. The capacitive switch controller according to claim 1 , wherein the capacitance detection circuit includes a variable capacitor for calibration connectable to the sense pin, and

wherein the calibration circuit is structured to control a capacitance value of the variable capacitor so that a measured capacitance value of the sense pin at each channel may approximate a reference value.

14. The capacitive switch controller according to claim 13 , wherein the abnormality detection circuit is structured to detect an abnormality based on a relative relationship among the controlled capacitance values of the variable capacitors.

15. The capacitive switch controller according to claim 1 , wherein the abnormality detection circuit is structured to detect an abnormality based on a relative relationship among change amounts of measurement values when a predetermined capacitance change is applied to each of the sense pins.

16. The capacitive switch controller according to claim 15 , wherein the calibration circuit is structured to control gains of the capacitance detection circuits so that detection sensitivities of respective channels may be uniform, and

wherein the abnormality detection circuit is structured to detect the abnormality based on a relative relationship among the controlled gains.

17. A capacitive switch comprising:

a plurality of sensor electrodes; and

the capacitive switch controller according to claim 1 .

18. An electronic device comprising:

the capacitive switch according to claim 17 .

19. A method for detecting an abnormality in a plurality of sensor electrodes, comprising:

obtaining an order of the capacitance values of the plurality of sense pins; and

detecting the abnormality based on a comparison result between the order of the capacitance values and an expected value for the order of the capacitance values of the plurality of sense pins.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 11, 2018
From: IWAMOTO, YUKIHIRO; HIRAKAWA, MASAYA
To: ROHM CO., LTD.
Reel/Frame 047133/0857 →
Priority Claims (2)
JP JP2017-198415 · Oct 12, 2017 · national
JP JP2018-172151 · Sep 14, 2018 · national
Continuity (1)
Related Publication 20190113574A1 · Apr 18, 2019