Nanosheet FET bottom isolation
A technique relates to a semiconductor device. A rare earth material is formed on a substrate. An isolation layer is formed at an interface of the rare earth material and the substrate. Channel layers are formed over the isolation layer. Source or drain (S/D) regions are formed on the isolation layer.
1. A semiconductor device comprising:
a rare earth material formed on a substrate;
an isolation layer formed in between the rare earth material and the substrate, the isolation layer being in direct contact with both the rare earth material and the substrate;
channel layers formed over the isolation layer; and
source or drain (S/D) regions formed on the isolation layer, the S/D regions formed on end surfaces of the channel layers, the S/D regions and the isolation layer sandwiching the rare earth material, the S/D regions being in direct contact with the rare earth material.
2. The semiconductor device of claim 1 , wherein a dielectric layer is on the channel layers.
3. The semiconductor device of claim 1 , wherein one or more work function materials are formed on the channel layers and on the isolation layer.
4. The semiconductor device of claim 3 , wherein the isolation layer separates the one or more work function materials from the substrate.
5. The semiconductor device of claim 1 , wherein the isolation layer physically separates and electrically isolates the S/D regions from the substrate.
6. The semiconductor device of claim 1 , wherein the rare earth material comprises a rare earth oxide.
7. The semiconductor device of claim 1 , wherein the rare earth material comprises a rare earth oxide with a cubic lattice.
8. The semiconductor device of claim 1 , wherein the rare earth material comprises a rare earth oxide having a lattice constant that comprises about twice a lattice constant of a material of the substrate.
9. The semiconductor device of claim 1 , wherein a lattice structure of the rare earth material substantially matches a lattice structure of the channel layers.
10. The semiconductor device of claim 1 , wherein the isolation layer comprises an oxide material.
11. The semiconductor device of claim 1 , wherein the isolation layer is formed as an oxide of a material of the substrate.
12. The semiconductor device of claim 1 , wherein the isolation layer comprises silicon.
13. The semiconductor device of claim 1 , wherein the isolation layer comprises silicon dioxide.
14. The semiconductor device of claim 1 , wherein the isolation layer comprises oxygen molecules.
15. The semiconductor device of claim 1 , wherein a dielectric layer is on the channel layers and the dielectric layer is comprises a dielectric constant greater than 3.9.
16. The semiconductor device of claim 15 , wherein the dielectric layer comprises hafnium.
17. The semiconductor device of claim 15 , wherein the dielectric layer comprises aluminum.
18. The semiconductor device of claim 15 , wherein the dielectric layer comprises tantalum.
19. The semiconductor device of claim 15 , wherein the dielectric layer comprises zirconium.
20. The semiconductor device of claim 1 , wherein the S/D regions are formed directly on the rare earth material.