Method for sending and determining timing information, apparatus, storage medium, and processor

1. A method for transmitting timing information, comprising:

carrying timing information by using a demodulation reference signal, DMRS; and

transmitting the DMRS carrying the timing information to the terminal,

wherein the timing information comprises

N least significant bits of the synchronization signal block index, where N is a positive integer;

and

half frame timing information,

wherein the carrying the timing information by using the DMRS comprises:

carrying the timing information by using a DMRS sequence of the DMRS, wherein the DRMS sequence is mapped to a resource comprising in a part of physical broadcast channel, PBCH, symbols, a part of resource elements, REs, in a frequency band outside a synchronization signal to which the DMRS sequence is mapped; and in remaining PBCH symbols, a part of REs in a PBCH bandwidth to which the DMRS sequence is mapped.

2. The method according to claim 1 , wherein the carrying the timing information by using the DMRS comprises:

when a number of candidate synchronization signal blocks is 4, defining four different DMRS sequences to be in one-to-one correspondence with four synchronization signal blocks; and

when a number of candidate synchronization signal blocks is 8, defining eight different DMRS sequences to be in one-to-one correspondence with eight synchronization signal blocks.

3. The method according to claim 1 , comprising:

carrying the timing information by using the DMRS sequence and bit information carried by a physical broadcast channel, PBCH.

4. The method according to claim 3 , wherein the carrying the timing information by using the DMRS sequence and the bit information carried by the PBCH comprises:

when a number of candidate synchronization signal blocks is 64, defining eight different DMRS sequences for indicating three least significant bits of a synchronization signal block index; and introducing three bits of explicit information in PBCH information bits for indicating three most significant bits of a synchronization signal block index.

5. The method according to claim 1 , wherein the DMRS carries the timing information by dividing all defined DMRS sequences into two sequence groups, wherein a sequence group to which the DMRS sequence belongs being used to indicate first and second half frames in a radio frame.

6. A processor configured to perform the method of claim 1 during running.

7. A method for determining timing information, comprising:

receiving a demodulation reference signal, DMRS, transmitted by a base station; and

determining timing information carried in the DMRS,

wherein the timing information comprises:

N least significant bits of the synchronization signal block index, where N is a positive integer; and

half frame timing information,

wherein the determining the timing information carried in the DMRS comprises:

determining the timing information by using a DMRS sequence of the identified DMRS,

wherein the DRMS sequence is mapped to a resource comprising in a part of physical broadcast channel, PBCH, symbols, a part of resource elements, REs, in a frequency band outside a synchronization signal to which the DMRS sequence is mapped; and in remaining PBCH symbols, a part of REs in a PBCH bandwidth to which the DMRS sequence is mapped.

8. The method according to claim 7 , wherein determining the time information by using the DMRS sequence of the identified DMRS comprises:

when a number of candidate synchronization signal blocks is 4, determining the time information by using four different DMRS sequences being in one-to-one correspondence with four synchronization signal blocks; and

when a number of candidate synchronization signal blocks is 8, determining the time information by using eight different DMRS sequences being in one-to-one correspondence with eight synchronization signal blocks.

9. The method according to claim 7 , comprising:

determining the time information by using the DMRS sequence and bit information carried by a physical broadcast channel, PBCH.

10. The method according to claim 9 , wherein the determining the time information by using the DMRS sequence and bit information carried by the PBCH comprises:

when a number of candidate synchronization signal blocks is 64, determining three least significant bits of a synchronization signal block index by using eight defined different DMRS sequences; and determining three most significant bits of a synchronization signal block index by three bits of explicit information introduced in PBCH information bits.

11. An apparatus for transmitting timing information, comprising at least one processor configured to:

carry timing information by using a demodulation reference signal, DMRS; and

transmit the DMRS carrying the timing information to the terminal,

wherein the timing information comprises

N least significant bits of the synchronization signal block index, where N is a positive integer; and

half frame timing information,

wherein the at least one processor is further configured to carry the timing information by using a DMRS sequence of the DMRS,

wherein the DRMS sequence is mapped to a resource comprising in a part of physical broadcast channel, PBCH, symbols, a part of resource elements, REs, in a frequency band outside a synchronization signal to which the DMRS sequence is mapped; and in remaining PBCH symbols, a part of REs in a PBCH bandwidth to which the DMRS sequence is mapped.

12. The apparatus according to claim 11 , wherein the at least one processor is configured to carry the timing information by using the DMRS by:

when a number of candidate synchronization signal blocks is 4, defining four different DMRS sequences to be in one-to-one correspondence with four synchronization signal blocks; and

in condition that a number of candidate synchronization signal blocks is 8, defining eight different DMRS sequences to be in one-to-one correspondence with eight synchronization signal blocks.

13. The apparatus according to claim 11 , wherein the at least one processor is configured to:

carry the timing information by using the DMRS sequence and bit information carried by a physical broadcast channel, PBCH.

14. The apparatus according to claim 13 , wherein the at least one processor is configured to carry the timing information by using the DMRS sequence and the bit information carried by the PBCH by:

when a number of candidate synchronization signal blocks is 64, defining eight different DMRS sequences for indicating three least significant bits of a synchronization signal block index; and introducing three bits of explicit information in PBCH information bits for indicating three most significant bits of a synchronization signal block index.

15. The apparatus according to claim 11 , wherein the at least one processor is configured to carry the timing information by using the DMRS by:

dividing all defined DMRS sequences into two sequence groups, wherein a sequence group to which the DMRS sequence belongs being used to indicate first and second half frames in a radio frame.

16. An apparatus for determining timing information, comprising at least one processor configured to:

receive a demodulation reference signal, DMRS, transmitted by a base station; and

determine timing information carried in the DMRS,

wherein the timing information comprises:

N least significant bits of the synchronization signal block index, where N is a positive integer; and

half frame timing information,

wherein the at least one processor is further configured to:

determine the timing information by using a DMRS sequence of the identified DMRS,

wherein the DRMS sequence is mapped to a resource comprising in a part of physical broadcast channel, PBCH, symbols, a part of resource elements, REs, in a frequency band outside a synchronization signal to which the DMRS sequence is mapped; and in remaining PBCH symbols, a part of REs in a PBCH bandwidth to which the DMRS sequence is mapped.

17. The apparatus according to claim 16 , wherein the at least one processor is configured to determine the time information by using the DMRS sequence and bit information carried by a physical broadcast channel, PBCH.

18. The apparatus according to claim 17 , wherein the at least one processor is configured to determine the time information by using the DMRS sequence and the bit information carried by the PBCH by:

when a number of candidate synchronization signal blocks is 64, determining three least significant bits of a synchronization signal block index by using eight defined different DMRS sequences; and determining three most significant bits of a synchronization signal block index by three bits of explicit information introduced in PBCH information bits.