IP Library › Granted Patent US 11,036,431
Granted Patent B2
US 11,036,431 · App. 16/452,624 · Granted Jun 15, 2021

Accessing persistent memory via load and store

Inventors: Vishal C. Aslot (Round Rock, TX); Anil Kalavakolanu (Austin, TX); Brian W. Hart (Austin, TX); Evan Allen Zoss (Austin, TX)
Assignee: International Business Machines Corporation
G06F3/0659G06F3/0604G06F3/0673G06F9/30043G06F12/10G06F16/2282G06F21/44G06F2212/163
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,036,431
App. No.
16/452,624
Granted
Jun 15, 2021
Kind
B2
Abstract

A system for generating memory references is provided. Instructions to perform a memory data operation on a database from a computer system is received. A computing system generates a memory reference in a region of memory, wherein the memory reference is independent of where the memory is accessible by a computing system. A memory reference to a memory region on a database is stored by a computing system. A memory reference based, at least, on the memory data operation is translated. A data in the memory via the instruction to perform a memory data operation is accessed. A memory data from the database is retrieved.

Claims (45)

1. A computer-implemented method comprising:

generating, by one or more processors, a memory reference to a region of memory of a persistent memory, wherein the memory reference is independent of where the memory is accessible by a computing system;

receiving, by one or more processors, from a first host, instructions to perform a first memory data operation on the persistent memory, wherein the instructions to perform the first memory data operation include a first address associated with the first host;

translating, by one or more processors, the first address into an address associated with the memory reference based, at least, on an address table associated with the first host;

executing, by one or more processors, the first memory data operation on the persistent memory utilizing the address associated with the memory reference;

receiving, by one or more processors, from a second host, instructions to perform a second memory data operation on the persistent memory, wherein the instructions to perform the second memory data operation include a second address associated with the second host, and wherein the second address is different from the first address;

translating, by one or more processors, the second address into the address associated with the memory reference based, at least, on an address table associated with the second host; and

executing, by one or more processors, the second memory data operation on the persistent memory utilizing the address associated with the memory reference.

2. The computer-implemented method of claim 1 , wherein the memory reference includes: (i) a memory ID, and (ii) the address associated with the memory reference.

3. The computer-implemented method of claim 2 , wherein the address associated with the memory reference is a relative real address associated with the region of memory of the persistent memory.

4. The computer-implemented method of claim 1 , wherein the persistent memory operates as working storage memory for the first host and the second host.

5. The computer-implemented method of claim 1 , wherein the persistent memory operates as persistent storage for the first host and the second host.

6. The computer-implemented method of claim 1 , wherein the first memory data operation is a load request.

7. The computer-implemented method of claim 1 , wherein the first memory data operation is a store request.

8. A computer program product comprising:

one or more computer-readable storage media and program instructions stored on the one or more computer-readable storage media, the stored program instructions comprising:

program instructions to generate a memory reference to a region of memory of a persistent memory, wherein the memory reference is independent of where the memory is accessible by a computing system;

program instructions to receive, from a first host, instructions to perform a first memory data operation on the persistent memory, wherein the instructions to perform the first memory data operation include a first address associated with the first host;

program instructions to translate the first address into an address associated with the memory reference based, at least, on an address table associated with the first host;

program instructions to execute the first memory data operation on the persistent memory utilizing the address associated with the memory reference;

program instructions to receive, from a second host, instructions to perform a second memory data operation on the persistent memory, wherein the instructions to perform the second memory data operation include a second address associated with the second host, and wherein the second address is different from the first address;

program instructions to translate the second address into the address associated with the memory reference based, at least, on an address table associated with the second host; and

program instructions to execute the second memory data operation on the persistent memory utilizing the address associated with the memory reference.

9. The computer program product of claim 8 , wherein the memory reference includes: (i) a memory ID, and (ii) the address associated with the memory reference.

10. The computer program product of claim 9 , wherein the address associated with the memory reference is a relative real address associated with the region of memory of the persistent memory.

11. The computer program product of claim 8 , wherein the persistent memory operates as working storage memory for the first host and the second host.

12. The computer program product of claim 8 , wherein the persistent memory operates as persistent storage for the first host and the second host.

13. The computer program product of claim 8 , wherein the first memory data operation is a load request.

14. The computer program product of claim 8 , wherein the first memory data operation is a store request.

15. A computer system comprising:

one or more computer processors;

one or more computer readable storage medium; and

program instructions stored on the computer readable storage medium for execution by at least one of the one or more processors, the stored program instructions comprising:

program instructions to generate a memory reference to a region of memory of a persistent memory, wherein the memory reference is independent of where the memory is accessible by a computing system;

program instructions to receive, from a first host, instructions to perform a first memory data operation on the persistent memory, wherein the instructions to perform the first memory data operation include a first address associated with the first host;

program instructions to translate the first address into an address associated with the memory reference based, at least, on an address table associated with the first host;

program instructions to execute the first memory data operation on the persistent memory utilizing the address associated with the memory reference;

program instructions to receive, from a second host, instructions to perform a second memory data operation on the persistent memory, wherein the instructions to perform the second memory data operation include a second address associated with the second host, and wherein the second address is different from the first address;

program instructions to translate the second address into the address associated with the memory reference based, at least, on an address table associated with the second host; and

program instructions to execute the second memory data operation on the persistent memory utilizing the address associated with the memory reference.

16. The computer system of claim 15 , wherein the memory reference includes: (i) a memory ID, and (ii) the address associated with the memory reference.

17. The computer system of claim 15 , wherein the persistent memory operates as working storage memory for the first host and the second host.

18. The computer system of claim 15 , wherein the persistent memory operates as persistent storage for the first host and the second host.

19. The computer system of claim 15 , wherein the first memory data operation is a load request.

20. The computer system of claim 15 , wherein the first memory data operation is a store request.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 26, 2019
From: ASLOT, VISHAL C.; KALAVAKOLANU, ANIL; HART, BRIAN W.; ZOSS, EVAN ALLEN
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 049588/0861 →
Continuity (1)
Related Publication 20200409595A1 · Dec 31, 2020
Cited By (2)
US 12,204,907 US 12,748,597