IP Library › Granted Patent US 11,041,892
Granted Patent B2
US 11,041,892 · App. 16/182,104 · Granted Jun 22, 2021

Semiconductor device, semiconductor system, and control method of the same

Inventors: Takahiko Gomi (Tokyo, JP); Ryu Nagasawa (Tokyo, JP)
Assignee: RENESAS ELECTRONICS CORPORATION
G01R21/02G01K7/01G05B11/42G06F1/206G06F1/324G06F1/3206G06F9/5094
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Quick Facts
Patent No.
US 11,041,892
App. No.
16/182,104
Granted
Jun 22, 2021
Kind
B2
Abstract

A semiconductor device is provided which can suppress heating while assigning performances to a plurality of modules whose heat generations are controlled while considering usage conditions of the plurality of modules. The semiconductor device includes a load detection unit that detects operation rates of the plurality of modules, a weighting calculation unit that calculates coefficients of the plurality of modules based on the operation rates of the plurality of modules, and a heat generation control unit that controls power consumptions of the plurality of modules based on the coefficients of the plurality of modules.

Claims (39)

1. A semiconductor device comprising:

a load detection unit that detects a first operation rate of a first module and a second operation rate for a second module;

a weighting calculation unit that:

calculates 1) first power consumption for the first module based on the first operation rate of the first module and 2) second power consumption for the second module based on the second operation rate of the second module; and

calculates 1) a first ratio of i) the calculated first power consumption for the first module to ii) a sum of the first and second power consumptions as a first coefficient of the first module, and 2) a second ratio of i) the calculated second power consumption for the second module to ii) the sum of the first and second power consumptions as a second coefficient of the second module; and

a heat generation control unit that controls power consumption for the first module and the second module based on the first coefficient and the second coefficient, respectively.

2. The semiconductor device according to claim 1 , further comprising:

a power calculation unit that calculates available power P(t) for the first module and the second module based on (1) junction temperature Tcurrent(t) on a chip on which the semiconductor device is mounted, and (2) target junction temperature Tcontrol(t),

wherein the power calculation unit calculates the available power P(t) by using PID control, and

wherein the heat generation control unit distributes the available power P(t) to the first module based on the first coefficient and the second module based on the second coefficient.

3. The semiconductor device according to claim 1 , wherein the first operation rate of the first module and the second operation rate of the second module are acquired in real time by using a scheduler function of an operating system.

4. A semiconductor system comprising:

a first semiconductor device; and

a second semiconductor device,

wherein the first semiconductor device includes

a load detection unit that detects a first operation rate of a first module of the first semiconductor device and a second operation rate of a second module of the second semiconductor device,

a weighting calculation unit that:

calculates 1) first power consumption of the first module based on the first operation rate of the first module and 2) second power consumption of the second module based on the second operation the second module; and

calculates 1) a first ratio of the calculated first power consumption of the first module to a sum of the first and second power consumptions as a first coefficient of the first module, and 2) a second ratio of the calculated second power consumption of the second module to the sum of the first and second power consumptions as a second coefficient of the second module, and

a heat generation control unit that controls power consumptions of the first module and the second module based on the first coefficient and the second coefficient, respectively.

5. The semiconductor system according to claim 4 , further comprising:

a power calculation unit that calculates available power P(t) for the first module and the second module based on (1) junction temperature Tcurrent(t) on a chip on which the first semiconductor device is mounted and (2) target junction temperature Tcontrol(t),

wherein the power calculation unit calculates the available power P(t) by using PID control, and

wherein the heat generation control unit that 1) distributes the available power P(t) to the first module based on the first coefficient and the second module based on the second coefficient.

6. The semiconductor system according to claim 5 ,

wherein the first semiconductor device further includes a temperature detection unit that detects first Tcurrent(t) which is junction temperature on the chip of the first semiconductor device and second Tcurrent(t) which is junction temperature on a chip of the second semiconductor device,

wherein the weighting calculation unit calculates temperature coefficients of the first semiconductor device and the second semiconductor device based on first Tdiff(t) obtained by subtracting the first Tcurrent(t) from target junction temperature Tcontrol(t) and second Tdiff(t) obtained by subtracting the second Tcurrent(t) from the target junction temperature Tcontrol(t), and

wherein the heat generation control unit controls the power consumptions of the first module and the second module based on the first and second coefficients and the temperature coefficients of the first semiconductor device and the second semiconductor device.

7. The semiconductor system according to claim 4 , wherein the first operation rate of the first module and the second operation rate of the second module are acquired in real time by using a scheduler function of an operating system.

8. A control method in a semiconductor device, the method comprising:

detecting a first operation rate of a first module and a second operation rate for a second module;

calculating power consumption for the first module based on the first operation rate of the first module and 2) second power consumption for the second module based on the second operation rate of the second module;

calculating 1) a first ratio of the calculated first power consumption for the first module to a sum of the first and second power consumptions as a first coefficient of the first module, and 2) a second ratio of the calculated second power consumption for the second module to the sum of the first and second power consumptions as a second coefficient of the second module; and

controlling power consumptions for the first module and the second module based on the first coefficient and the second coefficient, respectively.

9. The control method according to claim 8 , further comprising:

calculating available power P(t) for the first module and the second module based on (1) junction temperature Tcurrent(t) on a chip on which the semiconductor device is mounted and (2) target junction temperature Tcontrol(t); and

distributing the available power P(t) to the first module based on the first coefficient and the second module based on the second coefficient,

wherein the calculating the available power P(t) is calculating the available power P(t) by using PID control.

10. The control method according to claim 8 , wherein the first operation rate of the first module and the second operation rate of the second module are acquired in real time by using a scheduler function of an operating system.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 8, 2018
From: GOMI, TAKAHIKO; NAGASAWA, RYU
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 047449/0737 →
Priority Claims (1)
JP JP2017-246307 · Dec 22, 2017 · national
Continuity (1)
Related Publication 20190195924A1 · Jun 27, 2019