IP Library Granted Patent US 11,050,135
Granted Patent B2
US 11,050,135 · App. 16/884,064 · Granted Jun 29, 2021

Antenna-in-package with better antenna performance

Inventors: Yen-Ju Lu (Hsin-Chu, TW); Wen-Chou Wu (Hsinchu, TW)
Assignee: MEDIATEK INC.
H01Q1/2283H01L23/28H01L23/528H01L23/645H01L23/66H01Q1/48H01Q1/525H01Q9/26H01Q21/062H01Q21/12H01L2223/6677
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Quick Facts
Patent No.
US 11,050,135
App. No.
16/884,064
Granted
Jun 29, 2021
Kind
B2
Abstract

An Antenna-in-Package (AiP) includes an interface layer having at least an antenna layer and an insulating layer disposed under the antenna layer. The antenna layer includes a first antenna region and a second antenna region spaced apart from the first antenna region. An integrated circuit die is disposed on the interface layer. The integrated circuit die is interposed between the first antenna region and the second antenna region. The first antenna region includes a first antenna element, a second antenna element extending along a first direction, and a feeding network electrically connecting the first antenna element and the second antenna element to the integrated circuit die. The feeding network, the first antenna element, and the second antenna element are coplanar. A plurality of solder balls is disposed on a surface of the interface layer.

Claims (22)

1. An Antenna-in-Package (AiP), comprising:

an interface layer comprising at least an antenna layer and an insulating layer disposed under the antenna layer, wherein the antenna layer comprises a first antenna region and a second antenna region spaced apart from the first antenna region;

an integrated circuit die disposed on the interface layer, wherein the integrated circuit die is interposed between the first antenna region and the second antenna region, wherein the first antenna region comprises a first antenna element, a second antenna element extending along a first direction, and a feeding network electrically connecting the first antenna element and the second antenna element to the integrated circuit die, wherein the feeding network, the first antenna element, and the second antenna element are coplanar; and

a plurality of solder balls disposed on a surface of the interface layer, wherein the first antenna element is disposed relatively farther away from the integrated circuit die and the second antenna element is disposed relatively closer to the integrated circuit die.

2. The AiP according to claim 1 , wherein the first antenna region is used for transmitting signals and the second antenna region is used for receiving signals.

3. The AiP according to claim 1 , wherein the interface layer comprises a substrate, an interconnection structure, a redistribution layer (RDL) structure, or an interposer substrate.

4. The AiP according to claim 1 , wherein the AiP further comprises a ground reflector layer, wherein the antenna layer and the ground reflector layer are formed in two different metal layers, respectively, which are in different horizontal planes.

5. The AiP according to claim 1 , wherein the integrated circuit die comprises an integrated circuit silicon die or a semiconductor chip that comprises relative functional circuits for transmitting and receiving millimeter-wave (mmW) or radio-frequency (RF) signals.

6. The AiP according to claim 1 , wherein the first antenna element and the second antenna element are two folded dipole antenna elements arranged in parallel with each other.

7. The AiP according to claim 1 , wherein the feeding network comprises two parallel feed lines.

8. The AiP according to claim 1 , wherein the feeding network is divided into two integral portions: a longitudinal portion extending along a second direction and a lateral portion extending along the first direction.

9. The AiP according to claim 8 , wherein two distal ends of the longitudinal portion are electrically coupled to the first antenna element and the second antenna element, respectively.

10. The AiP according to claim 8 , wherein the lateral portion is integrally connected to the longitudinal portion and is electrically coupled to the integrated circuit die.

11. The AiP according to claim 8 , wherein a distance L 1 between the first antenna element and the lateral portion of the feeding network is greater than a distance L 2 between the second antenna element and the lateral portion of the feeding network.

12. The AiP according to claim 11 , wherein a difference between L 1 and L 2 is approximately equal to a half wavelength λ g , wherein λ g is the guided wavelength of electromagnetic radiation transmitted via the antenna layer.

13. The AiP according to claim 1 , wherein the second antenna region has a layout that is mirror symmetric to a layout of the first antenna region.

14. The AiP according to claim 1 further comprising:

a first annular guard ring provided around the first antenna region; and

a second annular guard ring provided around the second antenna region, wherein the first annular guard ring continuously surrounds the first antenna region and the second annular guard ring continuously surrounds the second antenna region.

15. The AiP according to claim 14 , wherein first annular guard ring and the second annular guard ring are coplanar with the first and second antenna elements.

16. The AiP according to claim 1 further comprising:

a mesh type layout of ground ball pads around the first antennal region and the second antenna region.

Continuity (3)
Continuation 16145108 · Sep 27, 2018
Provisional Application 62577747 · Oct 27, 2017
Related Publication 20200287271A1 · Sep 10, 2020