IP Library › Granted Patent US 11,050,417
Granted Patent B2
US 11,050,417 · App. 15/922,922 · Granted Jun 29, 2021

Load-switch gate-protection circuit

Inventors: Dongyong Zhu (Shanghai, CN); Feng Cong (Shanghai, CN); FuChun Zhan (Shanghai, CN)
Assignee: NXP B.V.
H03K17/0822H02H9/04H03K5/24
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Quick Facts
Patent No.
US 11,050,417
App. No.
15/922,922
Granted
Jun 29, 2021
Kind
B2
Abstract

Gate-protection circuitry protects a transistor, such as a MOSFET, from large gate-to-source voltage differentials that can permanently damage the transistor's gate-oxide layer. A source-voltage detector selectively enables the gate-protection circuitry based on a source voltage of the transistor. The gate-protection circuit is implemented without any Zener diodes. The transistor may be a load switch that is selectively controlled to apply a supply voltage to a load.

Claims (75)

1. A load-switch circuit, comprising:

a main transistor having a gate terminal, a drain terminal, and a source terminal;

a turn-on circuit having an input configured to receive a control signal and an output connected to the gate terminal of the main transistor;

gate-protection circuitry connected between the gate and source terminals of the main transistor, wherein the gate-protection circuitry limits the gate-to-source voltage differential of the main transistor; and

a source-voltage detector having an input connected to the source terminal of the main transistor and an output connected to the gate-protection circuitry,

wherein the source-voltage detector disables the gate-protection circuitry based on a voltage level at the source terminal of the main transistor;

wherein the gate-protection circuitry comprises:

a pull-up transistor having a drain terminal connected to the source terminal of the main transistor;

a diode connected between a source terminal of the pull-up transistor and the gate terminal of the main transistor;

a disabling transistor having a gate terminal connected to the output of the source-voltage detector, a source terminal connected to ground, and a drain terminal connected to a gate terminal of the pull-up transistor; and

a first resistor connected between the source terminal of the main transistor and a node between the gate terminal of the pull-up transistor and the drain terminal of the disabling transistor.

2. The load-switch circuit of claim 1 , further comprising:

a pull-down transistor having a drain connected to the gate terminal of the main transistor, a source terminal connected to ground, and a gate terminal; and

a pull-down driver having an input configured to receive a pull-down control signal and an output connected to the gate terminal of the pull-down transistor,

wherein the pull-down driver controls the pull-down transistor based on the pull-down control signal.

3. The load-switch circuit of claim 2 ,

wherein the pulldown transistor is an n-type device.

4. The load-switch circuit of claim 1 ,

wherein the gate-protection circuitry further comprises a stabilizing capacitance connected in parallel with the first resistor between the source terminal of the main transistor and the gate terminal of the pull-up transistor.

5. The load-switch circuit of claim 1 ,

wherein the source-voltage detector comprises a comparator configured to compare a reference voltage to a feedback voltage based on the voltage level at the source terminal of the main transistor.

6. The load-switch circuit of claim 5 ,

wherein the source-voltage detector further comprises a voltage divider connected between the source terminal of the main transistor and ground and configured to generate the feedback voltage.

7. The load-switch circuit of claim 6 ,

wherein the voltage divider comprises at least two resistors connected in series.

8. The load-switch circuit of claim 6 ,

wherein the voltage divider comprises at least two diodes connected in series.

9. The load-switch circuit of claim 1 ,

wherein:

the drain terminal of the pull-up transistor is connected to the source terminal of the main transistor;

the source terminal of the pull-up transistor is connected to the anode of the diode; and

the cathode of the diode is connected to the gate terminal of the main transistor.

10. The load-switch circuit of claim 1 ,

wherein the pullup transistor and the disabling transistor are n-type devices.

11. The load-switch circuit of claim 1 ,

wherein the gate-protection circuitry is implemented without any Zener diodes.

12. The load-switch circuit of claim 1 , wherein the main transistor is a MOSFET transistor.

13. The load-switch circuit of claim 12 ,

wherein: the MOSFET transistor is a load switch having its drain terminal configured to be connected to a power supply and its source terminal configured to be connected to a load; and

the load-switch circuit further comprises:

an n-type pull-down transistor having a drain connected to the gate terminal of the load switch, a source terminal connected to ground, and a gate terminal; and

a pull-down driver having an input configured to receive a pull-down control signal and an output connected to the gate terminal of the pull-down transistor,

wherein: the pull-down driver is configured to control the pull-down transistor based on the pull-down control signal such that the pull-down driver turns on the pull-down transistor when the pull-down control signal indicates that the load switch is being turned off;

the gate-protection circuitry comprises:

a pull-up transistor having a gate terminal and connected in series to a diode between the source terminal of the load switch and the gate terminal of the load switch; and

a disabling transistor having a gate terminal connected to the output of the source-voltage detector,

wherein the pull-down transistor is connected in series with a first resistor at the gate terminal of the pull-up transistor;

the source-voltage detector comprises:

a comparator configured to compare a reference voltage to a feedback voltage based on the voltage level at the source terminal of the load switch; and

a voltage divider connected between the source terminal of the load switch and ground and configured to generate the feedback voltage;

the drain terminal of the pull-up transistor is connected to the source terminal of the load switch;

the source terminal of the pull-up transistor is connected to the anode of the diode;

the cathode of the diode is connected to the gate terminal of the load switch;

the pull-up transistor and the disabling transistor are n-type devices; and the gate-protection circuitry is implemented without any Zener diodes.

14. The load-switch circuit of claim 13 ,

wherein the gate-protection circuitry further comprises a stabilizing capacitance connected in parallel with the first resistor between the source terminal of the load switch and the gate terminal of the pull-up transistor.

15. The load-switch circuit of claim 13 ,

wherein the voltage divider comprises resistors connected in series.

16. The load-switch circuit of claim 13 ,

wherein the voltage divider comprises diodes connected in series.

17. A load-switch circuit, comprising:

a main transistor having a gate terminal, a drain terminal, and a source terminal;

a turn-on circuit having an input configured to receive a control signal and an output connected to the gate terminal of the main transistor;

gate-protection circuitry connected between the gate and source terminals of the main transistor, wherein the gate-protection circuitry limits the gate-to-source voltage differential of the main transistor; and

a source-voltage detector having an input connected to the source terminal of the main transistor and an output connected to the gate-protection circuitry,

wherein the source-voltage detector disables the gate-protection circuitry based on a voltage level at the source terminal of the main transistor;

a pull-down transistor having a drain connected to the gate terminal of the main transistor, a source terminal connected to ground, and a gate terminal; and

a pull-down driver having an input configured to receive a pull-down control signal and an output connected to the gate terminal of the pull-down transistor;

wherein the pull-down driver controls the pull-down transistor based on the pull-down control signal.

18. The load-switch circuit of claim 17 ,

wherein the source-voltage detector comprises a comparator configured to compare a reference voltage to a feedback voltage based on the voltage level at the source terminal of the main transistor.

19. The load-switch circuit of claim 18 ,

wherein the source-voltage detector further comprises a voltage divider connected between the source terminal of the main transistor and ground and configured to generate the feedback voltage.

20. The load-switch circuit of claim 17 ,

wherein the main transistor is a MOSFET transistor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 16, 2018
From: ZHU, DONGYONG; CONG, FENG; ZHAN, FUCHUN
To: NXP B.V.
Reel/Frame 045244/0626 →
Priority Claims (1)
CN 201711111411.8 · Nov 13, 2017 · national
Continuity (1)
Related Publication 20190149144A1 · May 16, 2019