IP Library › Granted Patent US 11,056,341
Granted Patent B2
US 11,056,341 · App. 16/571,934 · Granted Jul 6, 2021

Optical semiconductor element and method of manufacturing the same

Inventors: Takehiko Kikuchi (Osaka, JP); Morihiro Seki (Osaka, JP); Nobuhiko Nishiyama (Tokyo, JP)
Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
H01L21/205G02B6/12004G02B6/136H01L21/0262H01L21/02521H01L31/02327H01L33/58H01S5/0425H01S5/12H01S5/2238H01S5/2275H01S5/32391H01S5/343
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,056,341
App. No.
16/571,934
Granted
Jul 6, 2021
Kind
B2
Abstract

A method of manufacturing an optical semiconductor element includes: stacking a plurality of compound semiconductor layers on a first substrate containing a compound semiconductor; dividing the first substrate into small pieces; forming terraces, grooves, walls, and a first mesa for a waveguide on a second substrate containing silicon; jointing at least one small piece to the second substrate after the forming; wet-etching the first substrate so as to expose the compound semiconductor layers after the jointing; and forming a second mesa opposite to the first mesa from the compound semiconductor layers; wherein the grooves are formed on both sides of the first mesa, the terraces are formed on both sides of the first mesa and the grooves, and the walls are arranged in an extending direction of each groove.

Claims (29)

1. A method of manufacturing an optical semiconductor element comprising:

stacking a plurality of compound semiconductor layers on a first substrate containing a compound semiconductor;

dividing the first substrate into small pieces;

forming terraces, grooves, walls, and a first mesa for a waveguide on a second substrate containing silicon;

jointing at least one small piece to the second substrate after the forming;

wet-etching the first substrate so as to expose the compound semiconductor layers after the jointing; and

forming a second mesa opposite to the first mesa from the compound semiconductor layers;

wherein the grooves are formed on both sides of the first mesa,

the terraces are formed on both sides of the first mesa and the grooves, and

the walls are arranged in an extending direction of each groove.

2. The method of manufacturing the optical semiconductor element according to claim 1 , wherein

the at least one small piece is jointed to the second substrate so as to overlap with the first mesa, the terraces, the grooves and the walls, and

the second mesa is located between the walls in the extending direction of the grooves without overlapping with the walls.

3. The method of manufacturing the optical semiconductor element according to claim 1 , wherein

the first mesa and the walls have the same height.

4. The method of manufacturing the optical semiconductor element according to claim 1 , wherein

each of the walls orthogonally intersects the first mesa.

5. The method of manufacturing the optical semiconductor element according to claim 1 , wherein

an angle between each of the walls and the extending direction of the grooves is 30 degrees or more and 60 degrees or less.

6. The method of manufacturing the optical semiconductor element according to claim 1 , wherein

each of the walls is connected to the first mesa and one of the terraces.

7. The method of manufacturing the optical semiconductor element according to claim 1 , wherein

each of the walls is connected to one of the first mesa and the terraces without being connected to the other thereof,

the walls are formed along the extending direction of the grooves, and

the walls are located on each of both sides of the second mesa in the extending direction of the grooves.

8. The method of manufacturing the optical semiconductor element according to claim 7 , wherein

each of the walls is connected to the first mesa without being connected to the terraces.

9. The method of manufacturing the optical semiconductor element according to claim 1 , wherein

a thickness of each of the walls in the extending direction of the grooves is 0.1 μm or more and 2 μm or less.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 16, 2019
From: KIKUCHI, TAKEHIKO; SEKI, MORIHIRO; NISHIYAMA, NOBUHIKO
To: SUMITOMO ELECTRIC INDUSTRIES, LTD.
Reel/Frame 050390/0364 →
Priority Claims (1)
JP JP2018-180453 · Sep 26, 2018 · national
Continuity (1)
Related Publication 20200098567A1 · Mar 26, 2020