IP Library › Granted Patent US 11,056,470
Granted Patent B2
US 11,056,470 · App. 16/513,124 · Granted Jul 6, 2021

Electronic package and method for fabricating the same

Inventors: Kong-Toon Ng (Taichung, TW); Hung-Ho Lee (Taichung, TW); Chee-Key Chung (Taichung, TW); Chang-Fu Lin (Taichung, TW); Chi-Hsin Chiu (Taichung, TW)
Assignee: Siliconware Precision Industries Co., Ltd.
H01L25/105H01L21/568H01L24/16H01L24/24H01L24/81H01L24/82H01L25/50H01L2224/16145H01L2224/24153H01L2224/73209H01L2224/82005H01L2225/1035H01L2225/1041H01L2225/1058
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Quick Facts
Patent No.
US 11,056,470
App. No.
16/513,124
Granted
Jul 6, 2021
Kind
B2
Abstract

An electronic package is provided, including: an encapsulation layer embedded with a first electronic component and conductive pillars; a circuit structure disposed on one surface of the encapsulation layer; a second electronic component disposed on the circuit structure; an insulation layer formed on the other surface of the encapsulation layer; and a circuit portion disposed on the insulation layer. Since the first and second electronic components are disposed on two sides of the circuit structure, respectively, the electronic package has various functions and high performance. A method for fabricating the electronic package is also provided.

Claims (20)

1. An electronic package, comprising:

an encapsulation layer having a first surface and a second surface opposing the first surface;

a first electronic component embedded in the encapsulation layer and having an active surface and an inactive surface opposing the active surface;

a protection film disposed on the active surface of the first electronic component;

a bonding layer embedded in the encapsulation layer and in direct contact with the inactive surface of the first electronic component;

a plurality of conductive bodies disposed in the protection film and bonded and electrically connected to the first electronic component, wherein the protection film is flush with an end surface of the conductive bodies;

a plurality of conductive pillars embedded in the encapsulation layer;

a circuit structure disposed on the first surface of the encapsulation layer and electrically connected to the conductive pillars and the conductive bodies;

a second electronic component disposed on the circuit structure and electrically connected to the circuit structure, wherein the plurality of conductive bodies are located between the first electronic component and the second electronic component; and

an insulation layer formed on the second surface of the encapsulation layer.

2. The electronic package of claim 1 , wherein the protection film and the conductive bodies are embedded in the encapsulation layer.

3. The electronic package of claim 2 , wherein the first surface of the encapsulation layer is flush with the end surface of the conductive bodies.

4. The electronic package of claim 1 , wherein the first surface of the encapsulation layer is flush with an end surface of the conductive pillars.

5. The electronic package of claim 1 , further comprising a conductive bump, via which the second electronic component is disposed on and electrically connected to the circuit structure.

6. The electronic package of claim 1 , further comprising a packaging layer formed on the circuit structure and packaging the second electronic component.

7. The electronic package of claim 1 , further comprising a circuit portion disposed on the insulation layer and electrically connected to the conductive pillars.

8. The electronic package of claim 7 , wherein the circuit portion is at least one of a conductive pad and an under bump metallurgy.

9. The electronic package of claim 7 , further comprising a plurality of conductive elements disposed on the circuit portion.

10. The electronic package of claim 9 , further comprising a package substrate disposed on the plurality of conductive elements.

11. The electronic package of claim 1 , wherein the conductive pillars have a concave circumferential surface near an end surface thereof.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 16, 2019
From: NG, KONG-TOON; LEE, HUNG-HO; CHUNG, CHEE-KEY; LIN, CHANG-FU; CHIU, CHI-HSIN
To: SILICONWARE PRECISION INDUSTRIES CO., LTD.
Reel/Frame 049767/0148 →
Priority Claims (1)
TW 108121501 · Jun 20, 2019 · national
Continuity (1)
Related Publication 20200402965A1 · Dec 24, 2020
Cited By (1)
US 12,347,817