IP Library › Granted Patent US 11,057,005
Granted Patent B2
US 11,057,005 · App. 16/563,436 · Granted Jul 6, 2021

Low noise amplifier circuit

Inventors: Pete Sivonen (Raisio, FI); Jarkko Jussila (Turku, FI); Sami Vilhonen (Lieto, FI)
Assignee: Telefonaktiebolaget LM Ericsson (publ)
H03F1/56H03F1/223H03F1/26H03F3/193H03F3/265H04B1/1036H03F2200/222H03F2200/294H03F2200/387H03F2200/451H03F2200/489H03F2200/54H03F2200/87
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Quick Facts
Patent No.
US 11,057,005
App. No.
16/563,436
Granted
Jul 6, 2021
Kind
B2
Abstract

An amplifier for converting a single-ended input signal to a differential output signal. The amplifier comprises a first transistor, a second transistor, a third transistor and a fourth transistor. The first transistor, configured in common-source or common-emitter mode, receives the single-ended input signal and generates a first part of the differential output signal. The second transistor, also configured in common-source or common-emitter mode, generates a second part of the differential output signal. The third and fourth transistors are capacitively cross-coupled. The amplifier further comprises inductive degeneration such that a source or emitter of the first transistor is connected to a first inductor and a source or emitter of the second transistor is connected to a second inductor.

Claims (37)

1. A low noise amplifier for converting a single-ended input signal to a differential output signal, the amplifier comprising:

a first transistor, configured in common-source or common-emitter mode, to receive the single-ended input signal and generate a first part of the differential output signal;

a second transistor, configured in common-source or common-emitter mode, to generate a second part of the differential output signal; and

a third transistor and a fourth transistor, and wherein the third transistor and forth transistor are cross-coupled and connected to the first and second transistors such that:

a drain or collector of the first transistor is coupled to a gate or base of the fourth transistor via a first capacitor;

a drain or collector of the second transistor is coupled to a gate or base of the third transistor via a second capacitor;

the drain or collector of the first transistor is connected to a source or emitter of the third transistor, the drain or collector of the second transistor is connected to a source or emitter of the fourth transistor;

the drain or collector of the first transistor is coupled to a gate or base of the second transistor directly or via a third capacitor;

a source or emitter of the first transistor is connected to a first inductor and a source or emitter of the second transistor is connected to a second inductor; and

a load impedance coupled to a drain or collector of the third transistor and a drain or collector of the fourth transistor is configured to convert the differential output signal into a differential output voltage;

wherein a parasitic ground impedance couples the first inductor and the second inductor of the low noise amplifier to a ground.

2. The low noise amplifier of claim 1 , wherein the parasitic ground impedance equals zero Ohms (0Ω).

3. A wireless communication device comprising one or more amplifiers wherein each amplifier of the one or more amplifiers is a low noise amplifier for converting a single-ended input signal to a differential output signal, the amplifier comprising:

a first transistor configured in common-source or common-emitter mode, to receive the single-ended input signal and generate a first part of the differential output signal;

a second transistor configured in common-source or common-emitter mode, to generate a second part of the differential output signal; and

a third transistor and a fourth transistor, and wherein the third transistor and forth transistor are cross-coupled and connected to the first and second transistors such that:

a drain or collector of the first transistor is coupled to a gate or base of the fourth transistor via a first capacitor;

a drain or collector of the second transistor is coupled to a gate or base of the third transistor via a second capacitor;

the drain or collector of the first transistor is connected to a source or emitter of the third transistor, the drain or collector of the second transistor is connected to a source or emitter of the fourth transistor;

the drain or collector of the first transistor is coupled to a gate or base of the second transistor directly or via a third capacitor;

a source or emitter of the first transistor is connected to a first inductor and a source or emitter of the second transistor is connected to a second inductor; and

a load impedance coupled to a drain or collector of the third transistor and a drain or collector of the fourth transistor is configured to convert the differential output signal into a differential output voltage;

wherein a parasitic ground impedance couples the first inductor and the second inductor of the low noise amplifier to a ground.

4. A receiver for operating at multiple frequency bands, the receiver comprising:

one or more radio-frequency filters configured to receive a single-ended input signal and to generate a single-ended output signal;

one or more amplifiers configured to convert a single-ended input signal, being the single-ended output signal generated from the radio-frequency filter, to a differential output signal, wherein each amplifier of the one or more amplifiers is a low noise amplifier for converting a single-ended input signal to a differential output signal, the amplifier comprising:

a first transistor configured in common-source or common-emitter mode, to receive the single-ended input signal and generate a first part of the differential output signal;

a second transistor configured in common-source or common-emitter mode, to generate a second part of the differential output signal; and

a third transistor and a fourth transistor, and wherein the third transistor and forth transistor are cross-coupled and connected to the first and second transistors such that:

a drain or collector of the first transistor is coupled to a gate or base of the fourth transistor via a first capacitor;

a drain or collector of the second transistor is coupled to a gate or base of the third transistor via a second capacitor;

the drain or collector of the first transistor is connected to a source or emitter of the third transistor, the drain or collector of the second transistor is connected to a source or emitter of the fourth transistor;

the drain or collector of the first transistor is coupled to a gate or base of the second transistor directly or via a third capacitor;

a source or emitter of the first transistor is connected to a first inductor and a source or emitter of the second transistor is connected to a second inductor; and

a load impedance coupled to a drain or collector of the third transistor and a drain or collector of the fourth transistor is configured to convert the differential output signal into a differential output voltage;

wherein a parasitic ground impedance couples the first inductor and the second inductor of the low noise amplifier to a ground;

wherein input impedances of the one or more amplifiers are configured to match output impedances of the one or more radio frequency filters at operating frequencies respectively.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 6, 2019
From: SIVONEN, PETE; JUSSILA, JARKKO; VILHONEN, SAMI
To: OY L M ERICSSON AB
Reel/Frame 050297/0442 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 6, 2019
From: OY L M ERICSSON AB
To: TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)
Reel/Frame 050297/0478 →
Priority Claims (1)
EP 14157220 · Feb 28, 2014 · regional
Continuity (3)
Continuation 15916411 · Mar 9, 2018
Continuation 15120304
Related Publication 20190393844A1 · Dec 26, 2019
Cited By (1)
US 12,375,044