Distributed envelope tracking amplifier circuit and related apparatus
A distributed envelope tracking (ET) amplifier circuit and related apparatus are provided. The distributed ET amplifier apparatus includes an amplifier circuit configured to amplify a radio frequency (RF) signal based on a modulated voltage. In examples discussed herein, the amplifier circuit is co-located with an ET voltage circuit configured to supply the modulated voltage such that a trace inductance between the amplifier circuit and the ET voltage circuit can be reduced to below a defined threshold. By co-locating the amplifier circuit with the ET voltage circuit to reduce a coupling distance between the amplifier circuit and the ET voltage circuit and thus the trace inductance associated with the coupling distance, it may be possible to reduce degradation in the modulated voltage. As a result, it may be possible to improve efficiency and maintain linearity in the amplifier circuit, particularly when the RF signal is modulated at a higher modulation bandwidth.
1. A distributed envelope tracking (ET) amplifier circuit comprising:
interface circuitry configured to receive an ET target voltage and one or more supply voltages;
an ET voltage circuit coupled to the interface circuitry and comprising:
a local voltage amplifier configured to generate an initial modulated voltage based on the ET target voltage and a selected supply voltage among the one or more supply voltages; and
an offset capacitor coupled to the local voltage amplifier and configured to raise the initial modulated voltage by a predetermined offset voltage to generate a modulated voltage; and
an amplifier circuit configured to amplify a radio frequency (RF) signal based on the modulated voltage.
2. The distributed ET amplifier circuit of claim 1 , wherein the one or more supply voltages comprise a high supply voltage, a medium supply voltage lower than the high supply voltage, and a low supply voltage lower than the medium supply voltage.
3. The distributed ET amplifier circuit of claim 1 , wherein the ET voltage circuit is separated from the amplifier circuit by a conductive length having a trace inductance less than four-tenths (0.4) nanoHenry (nH).
4. The distributed ET amplifier circuit of claim 1 , further comprising:
a first semiconductor die comprising the ET voltage circuit; and
a second semiconductor die comprising the amplifier circuit.
5. The distributed ET amplifier circuit of claim 1 , wherein the ET voltage circuit further comprises a voltage selector configured to determine the selected supply voltage among the one or more supply voltages and provide the selected supply voltage to the local voltage amplifier.
6. The distributed ET amplifier circuit of claim 1 , wherein the ET voltage circuit further comprises a target voltage processing circuit coupled between the interface circuitry and the local voltage amplifier and configured to pre-process the ET target voltage based on a defined transfer function.
7. The distributed ET amplifier circuit of claim 1 , wherein the ET voltage circuit further comprises:
a voltage selector configured to determine the selected supply voltage among the one or more supply voltages and provide the selected supply voltage to the local voltage amplifier; and
a target voltage processing circuit coupled between the interface circuitry and the local voltage amplifier and configured to pre-process the ET target voltage based on a defined transfer function.
8. The distributed ET amplifier circuit of claim 1 , wherein:
the amplifier circuit is further configured to amplify the RF signal based on a direct current and an alternating current; and
the interface circuitry is further configured to receive and provide the direct current to the amplifier circuit.
9. The distributed ET amplifier circuit of claim 8 , wherein the local voltage amplifier is further configured to:
source or sink the alternating current;
generate and provide a sense current indicative of the alternating current sourced or sunk by the local voltage amplifier; and
provide the sense current to the interface circuitry.
10. The distributed ET amplifier circuit of claim 9 , wherein the ET voltage circuit further comprises notch circuitry coupled between the interface circuitry and the amplifier circuit.
11. The distributed ET amplifier circuit of claim 1 , wherein the ET voltage circuit further comprises bias circuitry configured to generate and provide a bias voltage to the amplifier circuit.
12. The distributed ET amplifier circuit of claim 1 , wherein the ET voltage circuit further comprises:
a bias voltage selector coupled to the interface circuitry and configured to determine a selected bias voltage among the one or more supply voltages; and
a low-dropout (LDO) regulator configured to receive the selected bias voltage from the bias voltage selector and provide the selected bias voltage to the amplifier circuit.
13. The distributed ET amplifier circuit of claim 1 , wherein the ET voltage circuit further comprises:
bias circuitry configured to generate and provide a bias voltage to the amplifier circuit;
a bias voltage selector coupled to the interface circuitry and configured to determine a selected bias voltage among the one or more supply voltages; and
a low-dropout (LDO) regulator configured to receive the selected bias voltage from the bias voltage selector and provide the selected bias voltage to the amplifier circuit.
14. The distributed ET amplifier circuit of claim 1 , further comprising a second amplifier circuit configured to amplify a second RF signal based on the modulated voltage.
15. The distributed ET amplifier circuit of claim 14 , wherein the interface circuitry is further configured to receive a control signal configured to activate one of the amplifier circuit and the second amplifier circuit in response to the RF signal being different from the second RF signal.
16. The distributed ET amplifier circuit of claim 14 , wherein the interface circuitry is further configured to receive a control signal configured to activate the amplifier circuit and the second amplifier circuit in response to the RF signal being identical to the second RF signal.
17. The distributed ET amplifier circuit of claim 1 , wherein the ET voltage circuit comprises:
a voltage selector configured to determine the selected supply voltage among the one or more supply voltages and provide the selected supply voltage to the local voltage amplifier;
a target voltage processing circuit coupled between the interface circuitry and the local voltage amplifier and configured to pre-process the ET target voltage based on a defined transfer function;
notch circuitry coupled between the interface circuitry and the amplifier circuit;
bias circuitry configured to generate and provide a bias voltage to the amplifier circuit;
a bias voltage selector coupled to the interface circuitry and configured to determine a selected bias voltage among the one or more supply voltages; and
a low-dropout (LDO) regulator configured to receive the selected bias voltage from the bias voltage selector and provide the selected bias voltage to the amplifier circuit.
18. The distributed ET amplifier circuit of claim 1 , configured to be coupled to a tracker circuit configured to provide the ET target voltage and the one or more supply voltages to the distributed ET amplifier circuit.
19. The distributed ET amplifier circuit of claim 18 , wherein the distributed ET amplifier circuit is coupled to the tracker circuit by a conductive trace having more than four-tenths (0.4) nanoHenry (nH) trace inductance.