IP Library Granted Patent US 11,061,572
Granted Patent B2
US 11,061,572 · App. 15/136,851 · Granted Jul 13, 2021

Memory object tagged memory monitoring method and system

Inventors: David A. Roberts (Boxborough, MA); Michael Ignatowski (Austin, TX)
Assignee: Advanced Micro Devices, Inc.
G06F3/061G06F3/0653G06F3/0685G06F9/5016G06F12/1027G06F12/1045G06F2212/1041G06F2212/68G06F2212/684
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Quick Facts
Patent No.
US 11,061,572
App. No.
15/136,851
Granted
Jul 13, 2021
Kind
B2
Abstract

Described are a method and processing apparatus to tag and track objects related to memory allocation calls. An application or software adds a tag to a memory allocation call to enable object level tracking. An entry is made into an object tracking table, which stores the tag and a variety of statistics related to the object and associated memory devices. The object statistics may be queried by the application to tune power/performance characteristics either by the application making runtime placement decisions, or by off-line code tuning based on a previous run. The application may add a tag to a memory allocation call to specify the type of memory characteristics requested based on the object statistics.

Claims (53)

1. A method for tracking an object to optimize allocation of a memory, the method comprising:

counting a number of access requests to the object, wherein the object is a memory allocation having a sub-page size, the memory allocation comprising two or more address ranges of memory addresses;

associating a tag with the object, wherein the tag is associated with memory addresses in the two or more address ranges, the two or more address ranges each comprising a plurality of memory addresses;

adding the tag into a translation lookaside buffer entry associated with a memory address at which the object resides, wherein the translation lookaside buffer entry also includes an address translation associated with the memory address; and

in response to the number of access requests exceeding a predetermined threshold:

adding a separate table entry in an object tracking table for each address range of the two or more address ranges of the object and the tag, wherein each of the separate table entries in the object tracking table maintains a plurality of object statistics for a plurality of memory events;

updating an object statistic for an occurrence of an associated memory event;

designating a designated memory for a particular memory event; and

allocating, in response to detecting the particular memory event, the memory based on the plurality of object statistics.

2. The method of claim 1 , wherein the object and tag are associated in a memory allocation instruction.

3. The method of claim 1 , wherein the object and tag are associated in a variable definition.

4. The method of claim 1 , wherein the tag is associated with the object upon receipt of a memory allocation instruction.

5. The method of claim 1 , wherein table entries are entered in multiple object tracking tables for the object and the tag, each object tracking table having an associated memory controller.

6. The method of claim 1 , wherein the tag further comprises an object identification parameter selected from a pool of object identification parameters.

7. A processing apparatus for tracking an object to optimize allocation of a memory comprising:

an object tracking table; and

a memory controller that is communicatively coupled to the object tracking table, wherein the memory controller is configured to:

count a number of access requests to the object, wherein the object is a memory allocation having a sub-page size, the memory allocation comprising two or more address ranges of memory addresses,

associate a tag with the object, wherein the tag is associated with memory addresses in the two or more address ranges, the two or more address ranges each comprising a plurality of memory addresses,

add the tag into a translation lookaside buffer entry associated with a memory address at which the object resides, wherein the translation lookaside buffer entry also includes an address translation associated with the memory address, and

in response to the number of access requests exceeding a predetermined threshold:

add a separate table entry in an object tracking table for each address range of the two or more address ranges of the object and the tag, wherein each of the separate table entries in the object tracking table maintains a plurality of object statistics for a plurality of memory events,

update an object statistic for an occurrence of an associated memory event,

designate a designated memory for a particular memory event based on the plurality of object statistics, and

allocate, in response to detecting the particular memory event, the memory based on the plurality of object statistics.

8. The processing apparatus of claim 7 , wherein the object and tag are associated in a memory allocation instruction.

9. The processing apparatus of claim 7 , wherein the object and tag are associated in a variable definition or in an object allocation instruction for object storage.

10. The processing apparatus of claim 7 , wherein the tag is associated with the object upon receipt of a memory allocation instruction.

11. The processing apparatus of claim 7 , further comprising:

a plurality of object tracking tables; and

a plurality of memory controllers, wherein:

there is a one-to-one correspondence between one of the plurality of object tracking tables and one of the plurality of memory controllers, and

table entries are entered in each object tracking table for the object and the tag.

12. The processing apparatus of claim 7 , wherein the tag further comprises an object identification parameter selected from a pool of object identification parameters.

13. A non-transitory computer readable medium including instructions, which when executed in a processing apparatus, cause the processing apparatus to execute instructions for tracking an object to optimize allocation of a memory, the instructions causing the processing apparatus to perform operations comprising:

counting a number of access requests to the object, wherein the object is a memory allocation having a sub-page size, the memory allocation comprising two or more address ranges of memory addresses;

associating a tag with the object, wherein the tag is associated with memory addresses in the two or more address ranges, the two or more address ranges each comprising a plurality of memory addresses;

adding the tag into a translation lookaside buffer entry associated with a memory address at which the object resides, wherein the translation lookaside buffer entry also includes an address translation associated with the memory address; and

in response to the number of access requests exceeding a predetermined threshold:

adding a separate table entry in an object tracking table for each address range of the two or more address ranges of the object and the tag, wherein each of the separate table entries in the object tracking table maintains a plurality of object statistics for a plurality of memory events;

updating an object statistic for an occurrence of an associated memory event;

designating a designated memory for a particular memory event; and

allocating, in response to detecting the particular memory event, the memory based on the plurality of object statistics.

14. The non-transitory computer readable medium of claim 13 , wherein the tag is one of an object identification parameter selected from a pool of object identification parameters.

15. The method of claim 1 , further comprising:

on a condition that the number of access requests does not exceed the predetermined threshold:

ignoring the tag.

16. The processing apparatus of claim 7 , wherein the memory controller is further configured to:

on a condition that the number of access requests does not exceed the predetermined threshold:

ignore the tag.

17. The method of claim 1 , wherein the address translation includes a virtual address and a physical address, wherein the tag is different from both the virtual address and the physical address.

18. The processing apparatus of claim 7 , wherein the address translation includes a virtual address and a physical address, wherein the tag is different from both the virtual address and the physical address.

19. The non-transitory computer readable medium of claim 13 , wherein the address translation includes a virtual address and a physical address, wherein the tag is different from both the virtual address and the physical address.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 26, 2016
From: ROBERTS, DAVID A.; IGNATOWSKI, MICHAEL
To: ADVANCED MICRO DEVICES, INC.
Reel/Frame 038381/0536 →
Continuity (1)
Related Publication 20170308297A1 · Oct 26, 2017
Cited By (1)
US 12,681,845