Memory device
According to an embodiment, a memory device includes a first memory cell and a second memory cell each including a variable resistance element and a switching element, and includes a read and write circuit. The circuit is configured to perform, as a first access, a write operation or a read operation on the first memory cell, and make a second access after the first access. As the second access, data is written into or read from the second memory cell, under a condition based on a type of the first access.
1. A memory device comprising:
a first memory cell including a variable resistance element and a switching element;
a second memory cell including a variable resistance element and a switching element; and
a read and write circuit configured to perform, as a first access, a write operation or a read operation on the first memory cell, and make a second access after the first access, wherein
data is written into or read from the second memory cell as the second access, under a condition based on a type of the first access.
2. The device according to claim 1 , wherein
the condition varies depending on whether the type is a first access type or a second access type, and
when the switching element in the first memory cell takes a conductive-state in the first access, the type is the first access type, and when the switching element in the first memory cell is in a nonconductive-state in the first access, the type is the second access type.
3. The device according to claim 2 , wherein
the read and write circuit is configured to use a voltage or current based on the condition in the second access, and
the voltage or current varies depending on whether the type is the first access type or the second access type.
4. The device according to claim 3 , wherein
when the type is the first access type, a magnitude of the voltage or current is smaller than a magnitude of the voltage or current when the type is the second access type.
5. The device according to claim 3 , wherein
when the data is read from the second memory cell as the second access, the voltage or current is used as a reference voltage or a reference current of a sense amplifier coupled to the second memory cell.
6. The device according to claim 4 , wherein
when the data is written into the second memory cell as the second access, the voltage or current is a write voltage or write current applied to or supplied to the second memory cell.
7. The device according to claim 3 , wherein
when the type is the first access type, a pulse width of the voltage or current is narrower than a pulse width of the voltage or current when the type is the second access type.
8. The device according to claim 3 , wherein
the condition is further based on a distance or a thermal resistance between the first memory cell and the second memory cell.
9. The device according to claim 1 , wherein
the first memory cell is identical to the second memory cell.
10. The device according to claim 1 , wherein
the first memory cell is different from the second memory cell.
11. The device according to claim 1 , wherein
the second access is started within a first period of time from a start of the first access.
12. The device according to claim 11 , wherein
the first period of time is twice longer one of a period of time for the write operation to be performed as the first access and a period of time for the read operation to be performed as the first access.
13. A memory device comprising:
a first memory cell including a variable resistance element and a switching element;
a second memory cell including a variable resistance element and a switching element; and
a read and write circuit configured to perform, as a first access, a write operation or a read operation on the first memory cell, and make a second access after the first access, wherein
data is written into or read from the second memory cell, as the second access, under a condition based on or not based on a distance or a thermal resistance between the first memory cell and the second memory cell, and
whether the condition is based on or not based on the distance or the thermal resistance depends on a type of the second access.
14. The device according to claim 13 , wherein
the switching element in the first memory cell takes a conductive-state in the first access.
15. The device according to claim 14 , wherein
when the second access is a read operation, the condition is based on the distance or the thermal resistance.
16. The device according to claim 14 , wherein
when the second access is a write operation to switch the variable resistance element in the second memory cell to a high resistance state, the condition is based on the distance or the thermal resistance, and
when the second access is a write operation to switch the variable resistance element in the second memory cell to a low resistance state, the condition is not based on the distance or the thermal resistance.
17. The device according to claim 14 , wherein
when the second access is a write operation to switch the variable resistance element in the second memory cell to a high resistance state, the condition is not based on the distance or the thermal resistance, and
when the second access is a write operation to switch the variable resistance element in the second memory cell to a low resistance state, the condition is based on the distance or the thermal resistance.
18. The device according to claim 14 , wherein
the first memory cell is identical to the second memory cell.
19. The device according to claim 14 , wherein
the first memory cell is different from the second memory cell.
20. The device according to claim 13 , wherein
the second access is started within a first period of time from a start of the first access.
21. The device according to claim 20 , wherein
the first period of time is twice longer one of a period of time for the write operation to be performed as the first access and a period of time for the read operation to be performed as the first access.