IP Library › Granted Patent US 11,062,845
Granted Patent B2
US 11,062,845 · App. 16/536,520 · Granted Jul 13, 2021

Multilayer ceramic capacitor and board having the same

Inventors: Moon Soo Park (Suwon-si, KR); Jae Hun Choe (Suwon-si, KR); Dong Hun Kim (Suwon-si, KR); Byung Chul Jang (Suwon-si, KR); Chang Hak Choi (Suwon-si, KR); Byung Kun Kim (Suwon-si, KR)
Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
H01G4/012H01G4/12H01G4/30H05K1/0231H01G4/232H01G4/2325H05K1/0306H05K1/111H05K1/181
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Quick Facts
Patent No.
US 11,062,845
App. No.
16/536,520
Granted
Jul 13, 2021
Kind
B2
Abstract

A multilayer ceramic capacitor (MLCC) includes a body including first dielectric layers and second dielectric layers, the body including first to sixth surfaces, a second surface, a third surface, a fourth surface, a fifth surface and a sixth surface; first internal electrodes disposed on the first dielectric layers, exposed to the third surface, the fifth surface, and the sixth surface, and spaced apart from the fourth surface by first spaces; second internal electrodes disposed on the second dielectric layers to oppose the first internal electrodes with the first dielectric layers or the second dielectric layers interposed therebetween, exposed to the fourth surface, the fifth surface, and the sixth surface, and spaced apart from the third surface by second spaces; first dielectric patterns disposed in at least a portion of the first spaces, and second dielectric patterns disposed in at least a portion of the second spaces; and lateral insulating layers.

Claims (46)

1. A multilayer ceramic capacitor (MLCC), comprising:

a body including first dielectric layers and second dielectric layers, the body including a first surface and a second surface opposing each other in a stacking direction, a third surface and a fourth surface connected to the first surface and the second surface and opposing each other, and a fifth surface and a sixth surface connected to the first surface, the second surface, the third surface, and the fourth surface and opposing each other;

first internal electrodes disposed on the first dielectric layers, exposed to the third surface, the fifth surface, and the sixth surface, and spaced apart from the fourth surface by first spaces;

second internal electrodes disposed on the second dielectric layers to oppose the first internal electrodes with the first dielectric layers or the second dielectric layers interposed therebetween, exposed to the fourth surface, the fifth surface, and the sixth surface, and spaced apart from the third surface by second spaces;

first dielectric patterns disposed in at least portions of the first spaces;

second dielectric patterns disposed in at least portions of the second spaces; and

a first external electrode and a second external electrode disposed on the third surface and the fourth surface and connected to the first internal electrodes and the second internal electrodes, respectively,

wherein the first and second dielectric patterns are composed of a material different from a material of the first and second dielectric layers, and

the first and second dielectric patterns include a dielectric that includes a glass component including an alkali metal.

2. The MLCC of claim 1 , wherein the second internal electrodes each include a second capacity portion and a second lead portion connecting the second capacity portion to the second external electrode while having a width narrower than a width of the second capacity portion.

3. The MLCC of claim 1 , wherein the first internal electrodes each include a first capacity portion and a first lead portion connecting the first capacity portion to the first external electrode while having a width narrower than a width of the first capacity portion.

4. The MLCC of claim 3 , wherein the width of the first lead portion with respect to the first capacity portion is 10% to 50%.

5. The MLCC of claim 3 , further comprising third dielectric patterns disposed on portions of the first dielectric layers in which the first capacity portion is in contact with the first lead portion.

6. The MLCC of claim 5 , wherein the third dielectric patterns include the same dielectric included in the first and second dielectric patterns.

7. A multilayer ceramic capacitor (MLCC), comprising:

a body including first dielectric layers and second dielectric layers, the body including a first surface and a second surface opposing each other in a stacking direction, a third surface and a fourth surface connected to the first surface and the second surface and opposing each other, and a fifth surface and a sixth surface connected to the first surface, the second surface, the third surface, and the fourth surface and opposing each other;

first internal electrodes disposed on the first dielectric layers, exposed to the third surface, the fifth surface, and the sixth surface, and spaced apart from the fourth surface by first spaces;

second internal electrodes disposed on the second dielectric layers to oppose the first internal electrodes with the first dielectric layers or the second dielectric layers interposed therebetween, exposed to the fourth surface, the fifth surface, and the sixth surface, and spaced apart from the third surface by second spaces;

first dielectric patterns disposed in at least portions of the first spaces and covering at least portions of the first internal electrodes in the stacking direction, respectively;

second dielectric patterns disposed in at least a portion of the second spaces and covering at least portions of the second internal electrodes in the stacking direction, respectively; and

a first external electrode and a second external electrode disposed on the third surface and the fourth surface and connected to the first internal electrodes and the second internal electrodes, respectively, and

wherein the first internal electrodes each include a first capacity portion and a first lead portion connecting the first capacity portion to the first external electrode while having a width narrower than a width of the first capacity portion,

the second internal electrodes each include a second capacity portion and a second lead portion connecting the second capacity portion to the second external electrode while having a width narrower than a width of the second capacity portion, and

the first and second dielectric patterns are composed of a material different from a material of the first and second dielectric layers.

8. The MLCC of claim 7 , wherein the width of the first lead portion with respect to the first capacity portion is 10% to 50%.

9. The MLCC of claim 7 , further comprising third dielectric patterns disposed on portions of the first dielectric layers in which the first capacity portion is in contact with the first lead portion.

10. The MLCC of claim 9 , wherein the third dielectric patterns include a dielectric, the dielectric including a low-temperature-sintered material having a glass component containing an alkali metal.

11. The MLCC of claim 10 , wherein the third dielectric patterns and the first and second dielectric patterns include a same dielectric.

12. A multilayer ceramic capacitor (MLCC), comprising:

a body including first dielectric layers and second dielectric layers, the body including a first surface and a second surface opposing each other in a stacking direction, a third surface and a fourth surface connected to the first surface and the second surface and opposing each other, and a fifth surface and a sixth surface connected to the first surface, the second surface, the third surface, and the fourth surface and opposing each other;

first internal electrodes disposed on the first dielectric layers, exposed to the third surface, the fifth surface, and the sixth surface, and spaced apart from the fourth surface by first spaces;

second internal electrodes disposed on the second dielectric layers to oppose the first internal electrodes with the first dielectric layers or the second dielectric layers interposed therebetween, exposed to the fourth surface, the fifth surface, and the sixth surface, and spaced apart from the third surface by second spaces;

first dielectric patterns disposed in at least portions of the first spaces;

second dielectric patterns disposed in at least portions of the second spaces;

lateral insulating layers disposed on the fifth surface and the sixth surface of the body; and

a first external electrode and a second external electrode disposed on the third surface and the fourth surface and connected to the first internal electrodes and the second internal electrodes, respectively,

wherein the first and second dielectric patterns include Na.

13. A multilayer ceramic capacitor (MLCC), comprising:

a body including first dielectric layers and second dielectric layers, the body including a first surface and a second surface opposing each other in a stacking direction, a third surface and a fourth surface connected to the first surface and the second surface and opposing each other, and a fifth surface and a sixth surface connected to the first surface, the second surface, the third surface, and the fourth surface and opposing each other;

first internal electrodes disposed on the first dielectric layers, exposed to the third surface, the fifth surface, and the sixth surface, and spaced apart from the fourth surface by first spaces;

second internal electrodes disposed on the second dielectric layers to oppose the first internal electrodes with the first dielectric layers or the second dielectric layers interposed therebetween, exposed to the fourth surface, the fifth surface, and the sixth surface, and spaced apart from the third surface by second spaces;

first dielectric patterns disposed in at least portions of the first spaces;

second dielectric patterns disposed in at least portions of the second spaces;

lateral insulating layers disposed on the fifth surface and the sixth surface of the body; and

a first external electrode and a second external electrode disposed on the third surface and the fourth surface and connected to the first internal electrodes and the second internal electrodes, respectively,

wherein the first and second dielectric patterns include Li.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 9, 2019
From: PARK, MOON SOO; CHOE, JAE HUN; KIM, DONG HUN; JANG, BYUNG CHUL; CHOI, CHANG HAK; KIM, BYUNG KUN
To: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Reel/Frame 050018/0631 →
Priority Claims (2)
KR 10-2017-0048049 · Apr 13, 2017 · national
KR 10-2017-0071512 · Jun 8, 2017 · national
Continuity (3)
Continuation 16299736 · Mar 12, 2019
Continuation 15805781 · Nov 7, 2017
Related Publication 20190362893A1 · Nov 28, 2019
Cited By (1)
US 12,334,262