Correlated double sampling pixel sensing front end
A system and method for operating a sensing circuit for sensing a pixel current of a pixel of a display panel using correlated double sampling. In some embodiments, the method includes: during a first interval of time, resetting a pixel sensing circuit; during a third interval of time following the first interval of time, operating the pixel sensing circuit in an integration mode; during a fourth interval of time following the third interval of time, operating the pixel sensing circuit in a hold mode; and during a fifth interval of time following the fourth interval of time, operating the pixel sensing circuit in the integration mode.
1. A system for sensing a current of a pixel in a display, the system comprising:
a differential low-pass filter having a differential input and a differential output, a first conductor of the differential input being configured to receive a difference between a pixel current and a reference current;
a differential integrator having a differential input and a differential output;
two mirroring capacitors coupling the differential output of the differential low-pass filter to the differential input of the differential integrator;
a polarity-reversing switch coupled between the mirroring capacitors and the differential input of the differential integrator, the polarity-reversing switch being configured to selectively switch the polarity of the connection between the mirroring capacitors and the differential input of the differential integrator; and
a pair of coupling switches coupled between the two mirroring capacitors and the polarity-reversing switch, each of the coupling switches being configured to selectively:
disconnect a terminal of a respective mirroring capacitor of the two mirroring capacitors from a corresponding terminal of the polarity-reversing switch and
connect the terminal of the respective mirroring capacitor to a supply node.
2. The system of claim 1 , wherein the differential low-pass filter comprises:
a differential amplifier;
two feedback capacitors, each connected between a respective conductor of the differential output of the differential low-pass filter and a corresponding conductor of the differential input of the differential low-pass filter; and
two reset switches, each connected across a respective feedback capacitor of the two feedback capacitors and configured to selectively discharge the respective feedback capacitor.
3. The system of claim 2 , wherein the differential amplifier is a fully differential amplifier.
4. The system of claim 2 , wherein the differential amplifier is a pseudo differential amplifier.
5. The system of claim 2 , wherein the differential integrator comprises:
a fully differential amplifier;
two feedback capacitors, each connected between a respective conductor of the differential output of the differential integrator and a corresponding conductor of the differential input of the differential integrator; and
two reset switches, each connected across a respective feedback capacitor of the two feedback capacitors and configured to selectively discharge the respective feedback capacitor.
6. The system of claim 5 , further comprising:
a display panel comprising a first pixel and a second pixel; and
a control circuit,
the control circuit being configured to:
set a stored voltage of the first pixel to a first value, the first value corresponding to an on state of the first pixel;
set a stored voltage of the second pixel to a second value, the first value corresponding to an off state of the second pixel;
close the reset switches of the differential low-pass filter;
close the reset switches of the differential integrator;
disable a current output of the first pixel;
open the reset switches of the differential low-pass filter;
open the reset switches of the differential integrator;
wait during a first integration interval;
cause the polarity-reversing switch to reverse the polarity of the connection between the mirroring capacitors and the differential input of the differential integrator; and
wait during a second integration interval.
7. The system of claim 6 , wherein the control circuit is further configured to wait, after opening the reset switches of the differential low-pass filter and before opening the reset switches of the differential integrator, during an interval having a length exceeding a fundamental time constant of the differential low-pass filter.
8. The system of claim 7 , wherein the control circuit is further configured to:
set the coupling switches to disconnect the two mirroring capacitors from the polarity-reversing switch at the end of the first integration interval;
wait during a maximum stabilization time; and
set the coupling switches to connect the two mirroring capacitors to the polarity-reversing switch at the beginning of the second integration interval,
the maximum stabilization time begin the larger of:
a time for the reference current to stabilize at the differential input of the differential low-pass filter, and
a time for the pixel current to stabilize at the differential input of the differential low-pass filter.
9. A method for operating a sensing circuit for sensing a pixel current of a pixel of a display panel, using correlated double sampling, the method comprising:
during a first interval of time, resetting a pixel sensing circuit;
during a third interval of time following the first interval of time, operating the pixel sensing circuit in an integration mode;
during a fourth interval of time following the third interval of time, operating the pixel sensing circuit in a hold mode; and
during a fifth interval of time following the fourth interval of time, operating the pixel sensing circuit in the integration mode,
the pixel sensing circuit being configured to sense the pixel current,
the pixel sensing circuit comprising a low-pass filter and an integrator connected to an output of the low-pass filter,
the method further comprising maintaining the polarity of the connection between the integrator and the output of the low-pass filter reversed during the fourth interval of time and during the fifth interval of time,
the resetting of the pixel sensing circuit comprising operating each of the low-pass filter and the integrator in a reset mode;
the operating in the integration mode comprising:
operating the low-pass filter in a normal mode and
operating the integrator in the normal mode, and
the operating in the hold mode comprising:
operating the low-pass filter in the normal mode,
operating the integrator in the normal mode, and
disconnecting the integrator from the low-pass filter.
10. The method of claim 9 , further comprising, during a second interval of time following the first interval of time and preceding the third interval of time, operating the pixel sensing circuit in a wait mode,
the operating in the wait mode comprising:
operating the low-pass filter in a normal mode and
operating the integrator in the reset mode until a noise current of the pixel reaches a steady state.
11. The method of claim 9 , wherein the low-pass filter is a differential low-pass filter and the integrator is a differential integrator.
12. The method of claim 11 , wherein the differential low-pass filter comprises:
a differential amplifier;
two feedback capacitors, each connected between a respective conductor of the differential output of the differential low-pass filter and a corresponding conductor of the differential input of the differential low-pass filter; and
two reset switches, each connected across a respective feedback capacitor of the two feedback capacitors and configured to selectively discharge the respective feedback capacitor.
13. The method of claim 12 , wherein the differential amplifier is a fully differential amplifier.
14. The method of claim 12 , wherein the differential amplifier is a pseudo differential amplifier.
15. The method of claim 11 , wherein the differential integrator comprises:
a differential amplifier;
two feedback capacitors, each connected between a respective conductor of the differential output of the differential integrator and a corresponding conductor of the differential input of the differential integrator; and
two reset switches, each connected across a respective feedback capacitor of the two feedback capacitors and configured to selectively discharge the respective feedback capacitor.
16. The method of claim 15 , wherein the differential amplifier is a fully differential amplifier.
17. The method of claim 15 , wherein the differential amplifier is a pseudo differential amplifier.
18. A system for sensing a current of a pixel in a display, the system comprising:
a filter having a differential input and a differential output, a first conductor of the differential input being configured to receive a difference between a pixel current and a reference current;
a differential integrator having a differential input and a differential output;
two mirroring capacitors coupling the differential output of the filter to the differential input of the differential integrator;
a polarity-reversing switch coupled between the mirroring capacitors and the differential input of the differential integrator, the polarity-reversing switch being configured to selectively switch the polarity of the connection between the mirroring capacitors and the differential input of the differential integrator; and
a pair of coupling switches coupled between the two mirroring capacitors and the polarity-reversing switch, each of the coupling switches being configured to selectively:
disconnect a terminal of a respective mirroring capacitor of the two mirroring capacitors from a corresponding terminal of the polarity-reversing switch and
connect the terminal of the respective mirroring capacitor to a supply node.
19. The system of claim 18 , wherein the means for low-pass filtering comprises:
a differential amplifier;
two feedback capacitors, each connected between a respective conductor of the differential output of the filter and a corresponding conductor of the differential input of the filter; and
two reset switches, each connected across a respective feedback capacitor of the two feedback capacitors and configured to selectively discharge the respective feedback capacitor.
20. The system of claim 19 , wherein the differential amplifier is a fully differential amplifier.