IP Library Granted Patent US 11,069,619
Granted Patent B2
US 11,069,619 · App. 16/238,208 · Granted Jul 20, 2021

Interconnect structure and electronic device employing the same

Inventors: Seunggeol Nam (Suwon-si, KR); Hyeonjin Shin (Suwon-si, KR); Keunwook Shin (Yongin-si, KR); Changhyun Kim (Seoul, KR); Kyung-Eun Byun (Seongnam-si, KR); Hyunjae Song (Hwaseong-si, KR); Eunkyu Lee (Yongin-si, KR); Changseok Lee (Seoul, KR); Alum Jung (Suwon-si, KR); Yeonchoo Cho (Seongnam-si, KR)
Assignee: Samsung Electronics Co., Ltd.
H01L23/5329H01L23/528H01L23/5226H01L23/53238H01L23/53276
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Quick Facts
Patent No.
US 11,069,619
App. No.
16/238,208
Granted
Jul 20, 2021
Kind
B2
Abstract

An interconnect structure and an electronic device including the interconnect structure are disclosed. The interconnect structure may include a metal interconnect having a bottom surface and two opposite side surfaces surrounded by a dielectric layer, a graphene layer on the metal interconnect, and a metal bonding layer providing interface adhesion between the metal interconnect and the graphene layer. The metal bonding layer includes a metal material.

Claims (48)

1. An interconnect structure comprising:

a dielectric layer;

a metal interconnect having a bottom surface, a first side, a second side opposite the first side, and a top surface,

the bottom surface, the first side, and the second side of the metal interconnect being surrounded by the dielectric layer;

a graphene layer on at least the top surface of the metal interconnect; and

a metal bonding layer providing interfacial bonding between the metal interconnect and the graphene layer, the metal bonding layer including a metal material,

wherein the graphene layer includes a first graphene layer on the top surface of the metal interconnect, second graphene layers on the first side and the second side of the metal interconnect, and a third graphene layer on the bottom surface of the metal interconnect, and

wherein the metal bonding layer is between the third graphene layer and the bottom surface of the metal interconnect.

2. The interconnect structure of claim 1 , wherein

the metal bonding layer is configured to restrict electro-migration between the metal interconnect and the graphene layer.

3. The interconnect structure of claim 2 , wherein

the metal bonding layer includes at least one of magnesium (Mg), aluminum (Al), scandium (Sc), titanium (Ti), vanadium ( ), chromium (Cr), manganese (Mn), nickel (Ni), copper (Cu), zinc (Zn), gallium (Ga), zirconium (Zr), niobium (Nb), molybdenum (Mo), lead (Pd), silver (Ag), cadmium (Cd), indium (In), tin (Sn), lanthanium (La), hafnium (Hf), tantalum (Ta), tungsten (W), iridium (Ir), platinum (Pt), gold (Au), bismuth (Bi), cobalt (Co), or ruthenium (Ru), or an alloy thereof.

4. The interconnect structure of claim 2 , wherein

the metal bonding layer has a continuous thin film shape or an island shape that partially exists.

5. The interconnect structure of claim 1 , wherein

the metal bonding layer further includes a first bonding layer and second bonding layers,

the first bonding layer is between the first graphene layer and the top surface of the metal interconnect; and

the second bonding layers are between the second graphene layers and the first side and the second side of the metal interconnect, respectively.

6. The interconnect structure of claim 1 , wherein

the metal bonding layer is between the first graphene layer and the top surface of the metal interconnect.

7. The interconnect structure of claim 1 , wherein

the dielectric layer further includes silicon (Si) and at least one of hydrogen (H), oxygen (O), carbon (C), nitrogen (N), or a combination thereof.

8. An electronic device comprising:

a device including at least one of a transistor, a capacitor, or a resistor; and

the interconnect structure of claim 1 connected to the device.

9. The interconnect structure of claim 1 , wherein

the metal bonding layer provides interfacial bonding between the top surface of the metal interconnect and a portion of the first graphene layer on a top surface of the metal bonding layer.

10. An interconnect structure comprising:

a dielectric laver;

a metal interconnect having a bottom surface, a first side, a second side opposite the first side, and a top surface,

the bottom surface the first side and the second side of the metal interconnect being surrounded by the dielectric layer;

a graphene laver on at least the top surface of the metal interconnect; and

a metal bonding layer providing interfacial bonding between the metal interconnect and the graphene layer, the metal bonding layer including a metal material,

wherein the graphene layer includes a first graphene layer on the top surface of the metal interconnect, second graphene layers on the first side and the second side of the metal interconnect, and a third graphene layer on the bottom surface of the metal interconnect, and

wherein the metal bonding layer includes a first bonding layer, second bonding layers and a third bonding layer,

the first bonding layer is between the first graphene laver and the top surface of the metal interconnect;

the second bonding layers are between the second graphene layers and the first side and the second side of the metal interconnect, respectively; and

wherein the third bonding layer is between the third graphene layer and the bottom surface of the metal interconnect.

11. An interconnect structure comprising:

a dielectric layer;

a metal interconnect having a bottom surface, a first side, a second side opposite the first side, and a toy surface,

the bottom surface, the first side, and the second side of the metal interconnect being surrounded by the dielectric layer;

a graphene layer on at least the toy surface of the metal interconnect; and

a metal bonding layer providing interfacial bonding between the metal interconnect and the graphene layer, the metal bonding layer including a metal material, wherein

the graphene layer includes a first graphene layer on the top surface of the metal interconnect, second graphene layers on the first side and the second side of the metal interconnect, and a third graphene layer on the bottom surface of the metal interconnect, and

wherein the metal bonding layer includes a first bonding layer, second bonding layers, and a third bonding layer,

the second bonding layers are between the second graphene layers and the first side and the second side of the metal interconnect, respectively, and

the third bonding layer is between the third graphene layer and the bottom surface of the metal interconnect.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 4, 2019
From: NAM, SEUNGGEOL; SHIN, HYEONJIN; SHIN, KEUNWOOK; KIM, CHANGHYUN; BYUN, KYUNG-EUN; SONG, HYUNJAE; LEE, EUNKYU; LEE, CHANGSEOK; JUNG, ALUM; CHO, YEONCHOO
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 047900/0133 →
Priority Claims (1)
KR 10-2018-0087273 · Jul 26, 2018 · national
Continuity (1)
Related Publication 20200035602A1 · Jan 30, 2020
Cited By (2)
US 12,211,744 US 12,341,063