Chip antenna
A chip antenna includes a first dielectric substrate, a second dielectric substrate spaced apart from and opposing the first dielectric substrate, a first patch disposed on the first dielectric substrate, a second patch disposed on the second dielectric substrate, and a mounting pad and a feed pad disposed on a mounting surface of the first dielectric substrate. The first dielectric substrate, mounted on a mounting substrate through the mounting pad, is electrically connected to the mounting substrate through the feed pad. One of the first dielectric substrate and the second dielectric substrate is formed of ceramic and another is formed of polytetrafluoroethylene (PTFE).
1. A chip antenna, comprising:
a first dielectric substrate;
a second dielectric substrate spaced apart from and opposing the first dielectric substrate;
a first patch disposed on the first dielectric substrate;
a second patch disposed on the second dielectric substrate; and
a mounting pad and a feed pad disposed on a mounting surface of the first dielectric substrate,
wherein the first dielectric substrate, mounted on a mounting substrate through the mounting pad, is electrically connected to the mounting substrate through the feed pad,
one of the first dielectric substrate and the second dielectric substrate is formed of ceramic and another is formed of polytetrafluoroethylene (PTFE),
the first patch is disposed on one surface of the first dielectric substrate opposing the second dielectric substrate, and
the chip antenna further comprises at least one first feed via extended in a thickness direction of the first dielectric substrate and connected to the first patch.
2. The chip antenna of claim 1 , wherein the first dielectric substrate is formed of ceramic and the second dielectric substrate is formed of PTFE.
3. The chip antenna of claim 1 , wherein the first dielectric substrate is formed of PTFE and the second dielectric substrate is formed of ceramic.
4. The chip antenna of claim 1 , wherein the second patch is disposed on one surface of the second dielectric substrate opposing the first dielectric substrate, and
the chip antenna further comprises at least one second feed via extended in a thickness direction of the first dielectric substrate, passing through a through-hole of the first patch, and connected to the second patch.
5. The chip antenna of claim 4 , further comprising:
a plurality of shielding vias disposed around the at least one second feed via.
6. The chip antenna of claim 4 , further comprising:
a third patch disposed on the another surface opposite to the one surface of the second dielectric substrate.
7. The chip antenna of claim 1 , further comprising:
a spacer disposed between the first dielectric substrate and the second dielectric substrate.
8. The chip antenna of claim 1 , further comprising:
a bonding layer disposed between the first dielectric substrate and the second dielectric substrate.
9. A chip antenna, comprising:
a dielectric substrate portion comprising a first dielectric substrate stacked on a second dielectric substrate;
a patch portion comprising a first patch and a second patch, sequentially provided in the dielectric substrate portion, and spaced apart from each other; and
a mounting pad and a feed pad disposed on a mounting surface of the first dielectric substrate,
wherein the first dielectric substrate, mounted on a mounting substrate through the mounting pad, is electrically connected to the mounting substrate through the feed pad,
one of the first dielectric substrate and the second dielectric substrate is formed of ceramic and another is formed of PTFE, and
one of the first dielectric substrate and the second dielectric substrate formed of PTFE embeds one of the first patch and the second patch.
10. The chip antenna of claim 9 , wherein the first dielectric substrate and the second dielectric substrate are directly bonded to each other.
11. The chip antenna of claim 9 , wherein the first dielectric substrate is formed of ceramic and the second dielectric substrate is formed of PTFE.
12. The chip antenna of claim 11 , wherein the first patch, disposed on one surface of the first dielectric substrate bonded to the second dielectric substrate, protrudes toward the second dielectric substrate, and
the second patch is embedded inside the second dielectric substrate.
13. The chip antenna of claim 9 , wherein the first dielectric substrate is formed of PTFE and the second dielectric substrate is formed of ceramic.
14. The chip antenna of claim 13 , wherein the first patch is embedded inside the first dielectric substrate, and
the second patch, disposed on one surface of the second dielectric substrate bonded to the first dielectric substrate, protrudes toward the first dielectric substrate.
15. A chip antenna, comprising:
a first patch disposed on a first dielectric substrate; and
a second patch, spaced apart from the first patch, disposed on a second dielectric substrate, wherein the first dielectric substrate is connected to a mounting substrate through a feed pad, and
wherein one of the first dielectric substrate and the second dielectric substrate is formed of ceramic and another is formed of polytetrafluoroethylene (PTFE),
the first patch, disposed on one surface of the first dielectric substrate bonded to the second dielectric substrate, protrudes toward the second dielectric substrate, and
the second patch is embedded inside the second dielectric substrate.
16. The chip antenna of claim 15 , wherein the first dielectric substrate and the second dielectric substrate are directly bonded to each other.
17. The chip antenna of claim 15 , wherein one of the first dielectric substrate and the second dielectric substrate formed of PTFE embeds one of the first patch and the second patch.