IP Library Granted Patent US 11,076,513
Granted Patent B2
US 11,076,513 · App. 16/284,231 · Granted Jul 27, 2021

Circuit module

Inventors: Shuichi Takizawa (Tokyo, JP); Hironori Sato (Tokyo, JP); Atsushi Yoshino (Tokyo, JP); Hideki Kachi (Tokyo, JP)
Assignee: TDK CORPORATION
H05K9/0045H01L23/3121H01L23/552H01L23/562H05K1/181H05K5/065H01L23/295H01L24/16H01L2224/16227H01L2924/3025H05K2201/1003H05K2201/1006H05K2201/10015H05K2201/10522H05K2201/10636H05K2201/10734
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Quick Facts
Patent No.
US 11,076,513
App. No.
16/284,231
Granted
Jul 27, 2021
Kind
B2
Abstract

A circuit module 2 comprises: a wiring structure 4 ; at least one electronic component 6 a, 6 b arranged on the upper surface of the wiring structure 4 ; an insulating resin layer 8 which is provided on the upper surface of the wiring structure 4 and in which at least one electronic component 6 a, 6 b is embedded; and a metal layer 10 provided on the upper surface of the insulating resin layer 8 . The surface roughness of the portion S 1 directly above each electronic component on the upper surface of the insulating resin layer 8 is expressed as R 1 . The surface roughness of the portion S 2 other than the portion directly above all the electronic components on the upper surface of the insulating resin layer 8 is expressed as R 2 . At least one R 1 satisfies the condition: R 1 >R 2.

Claims (4)

1. A circuit module comprising; a wiring structure; at least one electronic component arranged on an upper surface of the wiring structure; an insulating resin layer provided on the upper surface of the wiring structure and in which the at least one electronic component is embedded; and a metal layer provided on an upper surface of the insulating resin layer, wherein when a surface roughness of a portion directly above the at least one electronic component on the upper surface of the insulating resin layer is expressed as R 1 , and a surface roughness of a portion other than the portion directly above the at least one electronic component on the upper surface of the insulating resin layer is expressed as R 2 , at least one R 1 satisfies the condition: R 1 >R 2 , when a surface roughness of a portion directly above the at least one electronic component on an upper surface of the metal layer is expressed as R 3 , at least one R 1 and R 3 satisfy the condition: R 1 >R 3 , the upper surface of the insulating resin layer above the at least one electronic component and the upper surface of the at least one electronic component have a same shape, the at least one electronic component is an inductor, resistor, or surface acoustic wave (SAW) filter, and at least a part of an upper surface of the at least one electronic component has a concave or a convex configuration.

2. The circuit module according to claim 1 , wherein R 1 /R 2 ranges from 1.01 to 8.00.

3. The circuit module according to claim 1 , wherein the at least one electronic component is an inductor.

4. The circuit module according to claim 1 , wherein the portion directly above the at least one electronic component on the upper surface of the metal layer is flat.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 8, 2019
From: TAKIZAWA, SHUICHI; SATO, HIRONORI; YOSHINO, ATSUSHI; KACHI, HIDEKI
To: TDK CORPORATION
Reel/Frame 049118/0630 →
Priority Claims (1)
JP JP2018-033425 · Feb 27, 2018 · national
Continuity (1)
Related Publication 20190269046A1 · Aug 29, 2019