IP Library Granted Patent US 11,080,229
Granted Patent B2
US 11,080,229 · App. 16/458,187 · Granted Aug 3, 2021

Processor for calculating mathematical functions in parallel

Inventors: Guobiao Zhang (Corvallis, OR); Chen Shen (SuZhou, CN)
Assignees: HangZhou HaiCun Information Technology Co., Ltd.; Guobiao Zhang
G06F15/803G06F7/57H01L27/11551
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,080,229
App. No.
16/458,187
Granted
Aug 3, 2021
Kind
B2
Abstract

A three-dimensional processor (3D-processor) for calculating mathematical functions in parallel, comprises a larger number (e.g. at least one thousand) of computing elements, with each computing element comprising at least one three-dimensional memory (3D-M) array for storing at least a portion of a look-up table (LUT) for a mathematical function and an arithmetic logic circuit (ALC) for performing arithmetic operations on the LUT data. Even though each individual 3D-M cell is slower than a conventional two-dimensional memory (2D-M) cell, this deficiency in speed is offset by a significantly larger scale of parallelism.

Claims (28)

1. A three-dimensional processor (3D-processor) for calculating mathematical functions in parallel, comprising a single semiconductor substrate and a plurality of computing elements, each of said computing elements comprising:

at least a three-dimensional memory (3D-M) array including memory cells above said semiconductor substrate and storing at least a portion of a look-up table (LUT) for a mathematical function;

an arithmetic logic circuit (ALC) on said semiconductor substrate for performing at least an arithmetic operation on selected data from said LUT; and,

a plurality of inter-storage-processor (ISP) connections for communicatively coupling said 3D-M array with said ALC;

wherein said semiconductor substrate comprises at least a single-crystalline semiconductor material; and, said memory cells do not comprise any single-crystalline semiconductor material.

2. The processor according to claim 1 , wherein said memory cells comprise at least a poly-crystalline or amorphous semiconductor material.

3. The processor according to claim 1 , wherein said plurality of computing elements include more than one thousand computing elements.

4. The processor according to claim 1 , wherein said ISP-connections include contact vias through no semiconductor substrate.

5. The processor according to claim 1 , wherein: each of said computing elements comprises at least one thousand ISP-connections; or, the length of said ISP-connections is on the order of microns.

6. The processor according to claim 1 , wherein said LUT includes functional values and/or derivative values of said mathematical function.

7. The processor according to claim 1 , wherein said mathematical function is a mathematical model.

8. The processor according to claim 7 , wherein said mathematical model includes raw measurement data or smoothed measurement data.

9. The processor according to claim 1 , wherein said mathematical function is a combination of at least two mathematical functions.

10. The processor according to claim 1 , wherein said mathematical function includes more operations than arithmetic operations performable by said ALC.

11. A three-dimensional processor (3D-processor) for calculating mathematical functions in parallel, comprising a single semiconductor substrate and a plurality of computing elements, each of said computing elements comprising:

at least a three-dimensional memory (3D-M) array including memory cells above said semiconductor substrate and storing at least a portion of a look-up table (LUT) for a mathematical function;

an arithmetic logic circuit (ALC) on said semiconductor substrate for performing at least an arithmetic operation on selected data from said LUT; and,

a plurality of inter-storage-processor (ISP) connections for communicatively coupling said 3D-M array with said ALC;

wherein said processor comprises at least one thousand computing elements; and, the total LUT capacity of said processor is more than one gigabit.

12. The processor according to claim 11 , wherein said semiconductor substrate comprises at least a single-crystalline semiconductor material; and, said memory cells do not comprise any single-crystalline semiconductor material.

13. The processor according to claim 12 , wherein said memory cells comprise at least a poly-crystalline or amorphous semiconductor material.

14. The processor according to claim 11 , wherein said ISP-connections include contact vias through no semiconductor substrate.

15. The processor according to claim 11 , wherein: each of said computing elements comprises at least one thousand ISP-connections; or, the length of said ISP-connections is on the order of microns.

16. The processor according to claim 11 , wherein said LUT includes functional values and/or derivative values of said mathematical function.

17. The processor according to claim 11 , wherein said mathematical function is a mathematical model.

18. The processor according to claim 17 , wherein said mathematical model includes raw measurement data or smoothed measurement data.

19. The processor according to claim 11 , wherein said mathematical function is a combination of at least two mathematical functions.

20. The processor according to claim 11 , wherein said mathematical function cannot be represented by a combination of arithmetic operations performable by said ALC.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 30, 2025
From: HANGZHOU HAICUN INFORMATION TECHNOLOGY CO., LTD.
To: HONG KONG HAICUN TECHNOLOGY CO., LIMITED
Reel/Frame 072727/0571 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 6, 2025
From: ZHANG, GUOBIAO, DR.; SHEN, CHEN, DR.
To: HANGZHOU HAICUN INFORMATION TECHNOLOGY CO., LTD.
Reel/Frame 070747/0789 →
Priority Claims (4)
CN 201610083747.7 · Feb 13, 2016 · national
CN 201610260845.3 · Apr 22, 2016 · national
CN 201610289592.2 · May 2, 2016 · national
CN 201710237780.5 · Apr 12, 2017 · national
Continuity (2)
Continuation In Part 15487366 · Apr 13, 2017
Related Publication 20190324942A1 · Oct 24, 2019