Source contact and channel interface to reduce body charging from band-to-band tunneling
An apparatus is provided which comprises: a source and a drain with a semiconductor body therebetween, the source, the drain, and the semiconductor body on an insulator, a buried structure between the semiconductor body and the insulator, and a source contact coupled with the source and the buried structure, the source contact comprising metal. Other embodiments are also disclosed and claimed.
1. An integrated circuit device structure, comprising:
a source and a drain with a semiconductor body therebetween, the source, the drain, and the semiconductor body on an insulator, wherein a depth of the source is less than a depth of the drain;
a buried structure between the semiconductor body and the insulator; and
a source contact coupled with the source and the buried structure, the source contact comprising metal.
2. The integrated circuit device structure of claim 1 , wherein a junction between the buried structure and the drain is coplanar with the junction between the drain and the semiconductor body.
3. The integrated circuit device structure of claim 1 , further comprising:
a first spacer structure adjacent a junction between the source and the semiconductor body; and
a second spacer structure adjacent a junction between the drain and the semiconductor body, wherein a junction between the buried structure and the source contact is coplanar with a surface of the first spacer structure.
4. The integrated circuit device structure of claim 1 , wherein the source contact and the source are both coupled with the insulator.
5. The integrated circuit device structure of claim 1 , wherein the source contact is coupled with the insulator on opposite sides of the source, the buried structure between the source and the insulator.
6. The integrated circuit device structure of claim 1 , wherein the source and the drain comprise germanium.
7. The integrated circuit device structure of claim 6 , wherein the buried structure comprises silicon.
8. The integrated circuit device structure of claim 7 , wherein the insulator comprises silicon and oxygen.
9. The integrated circuit device structure of claim 8 , wherein the semiconductor body comprises germanium.
10. An integrated circuit device structure, comprising:
a source and a drain with a semiconductor body therebetween, the source, the drain, and the semiconductor body on an insulator;
a buried structure between the semiconductor body and the insulator; and
a source contact coupled with the source and the buried structure, the source contact comprising metal, wherein the source contact wraps around the source and a portion of the source contact is between the source and the insulator.
11. A system comprising:
a display subsystem;
a wireless communication interface; and
an integrated circuit device, the integrated circuit device comprising:
a source semiconductor and a drain semiconductor with a semiconductor body therebetween, the source semiconductor, the drain semiconductor, and the semiconductor body on an insulator;
a buried semiconductor material between the semiconductor body and the insulator, the semiconductor material layer having a different bandgap than that of the semiconductor body; and
a source contact coupled with the source and the buried semiconductor material, the source contact comprising metal.
12. The system of claim 11 , wherein a junction between the buried semiconductor material and the drain semiconductor is coplanar with the junction between the drain semiconductor and the semiconductor body.
13. The system of claim 11 , wherein a depth of the source semiconductor is less than a depth of the drain semiconductor.
14. The system of claim 11 , wherein the source contact wraps around the source semiconductor and a portion of the source contact is between the source semiconductor and the insulator.
15. The system of claim 11 , wherein the buried semiconductor comprises predominantly silicon.
16. The system of claim 11 , wherein the buried semiconductor material is between the source semiconductor and the insulator.
17. The system of claim 11 , wherein the buried semiconductor material comprises silicon and the semiconductor body comprises germanium.
18. The system of claim 17 , wherein the source and drain semiconductor comprises germanium.
19. A method of forming an integrated circuit device structure comprising:
forming a first layer on an insulator, wherein the first layer comprises a first semiconductor material;
forming a semiconductor body on the first layer, wherein the semiconductor body comprises a second semiconductor material having a different bandgap than that of the first semiconductor material;
removing a portion of the first layer;
forming a source semiconductor and a drain semiconductor over the insulator on opposite sides of the semiconductor body with a source contact coupled with both the source semiconductor and the first layer.
20. The method of claim 19 , wherein the method comprises:
etching a portion of the first layer to create an opening between the source semiconductor and the insulator; and
depositing a source contact metal within the opening, the source contact metal coupled with the source, the insulator, and the first layer.