IP Library Granted Patent US 11,101,300
Granted Patent B2
US 11,101,300 · App. 16/628,920 · Granted Aug 24, 2021

Semiconductor device and manufacturing method of semiconductor device

Inventors: Tatsuya Onuki (Atsugi, JP); Kiyoshi Kato (Atsugi, JP); Shuhei Nagatsuka (Atsugi, JP); Takanori Matsuzaki (Atsugi, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L27/1255H01L27/1225
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Quick Facts
Patent No.
US 11,101,300
App. No.
16/628,920
Granted
Aug 24, 2021
Kind
B2
Abstract

A semiconductor device enabling high integration is provided. The semiconductor device includes a plug, two capacitors, and two transistors sharing one oxide semiconductor. Each of the transistors includes a stacked-layer structure of a gate insulator and a gate electrode over the oxide semiconductor and an insulator in contact with a side surface of the gate electrode. An opening between the two gate electrodes exposes the insulators in contact with the side surfaces of the gate electrodes, and the plug is in the opening. The capacitor is directly provided over the oxide semiconductor. The side surface area of the capacitor is larger than the projected area of the capacitor.

Claims (53)

1. A semiconductor device comprising:

a first transistor;

a second transistor;

a first capacitor;

a second capacitor; and

a plug,

wherein the first transistor comprises:

an oxide semiconductor;

a first insulator over the oxide semiconductor;

a first conductor over the first insulator; and

a second insulator in contact with a side surface of the first conductor,

wherein the second transistor comprises:

the oxide semiconductor;

a third insulator over the oxide semiconductor;

a second conductor over the third insulator; and

a fourth insulator in contact with a side surface of the second conductor,

wherein the first capacitor comprises:

a third conductor over the oxide semiconductor and in contact with the second insulator;

a fifth insulator over the third conductor; and

a fourth conductor over the fifth insulator,

wherein the second capacitor comprises:

a fifth conductor over the oxide semiconductor and in contact with the fourth insulator;

the fifth insulator over the fifth conductor; and

a sixth conductor over the fifth insulator,

wherein the plug is in contact with the oxide semiconductor, the second insulator, and the fourth insulator,

wherein a side surface area of the first capacitor is larger than a projected area of the first capacitor, and

wherein a side surface area of the second capacitor is larger than a projected area of the second capacitor.

2. The semiconductor device according to claim 1 ,

wherein the oxide semiconductor comprises a first channel formation region and a second channel formation region,

wherein the first conductor overlaps with the first channel formation region, and

wherein the second conductor overlaps with the second channel formation region.

3. The semiconductor device according to claim 2 ,

wherein the oxide semiconductor further comprises a first region and a second region,

wherein the plug overlaps with the first region,

wherein the second region is between the first region and the first channel formation region,

wherein the first region has a higher carrier density than the second region, and

wherein the second region has a higher carrier density than the first channel formation region.

4. The semiconductor device according to claim 1 , further comprising:

a sixth insulator over the first transistor and the second transistor; and

a seventh insulator over the first capacitor, the second capacitor, and the sixth insulator,

wherein the sixth insulator comprises a first opening exposing the first insulator and a second opening exposing the third insulator,

wherein the first capacitor is in the first opening,

wherein the second capacitor is in the second opening,

wherein the sixth insulator and the seventh insulator comprise a third opening exposing the first insulator and the second insulator, and

wherein the plug is in the third opening.

5. The semiconductor device according to claim 4 , further comprising a seventh conductor over the seventh insulator and the plug,

wherein the seventh conductor is electrically connected to the plug.

6. The semiconductor device according to claim 5 ,

wherein the first conductor and the second conductor extend in a direction substantially perpendicular to a channel length direction of the first transistor, and

wherein the seventh conductor extends in a direction substantially parallel to the channel length direction of the first transistor.

7. The semiconductor device according to claim 1 ,

wherein the oxide semiconductor comprises In, an element M, and Zn, and

wherein the element M is Al, Ga, Y, or Sn.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 6, 2020
From: ONUKI, TATSUYA; KATO, KIYOSHI; NAGATSUKA, SHUHEI; MATSUZAKI, TAKANORI
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 051429/0305 →
Priority Claims (1)
JP JP2017-144764 · Jul 26, 2017 · national
Continuity (1)
Related Publication 20200144310A1 · May 7, 2020
Cited By (3)
US 12,300,484 US 12,538,475 US 12,563,742