Mixer circuit
View Patent ↗A resistive mixer includes a LO matching circuit inserted between the gate of an FET and a LO terminal, a bias circuit that is connected to the gate and applies a bias voltage to the gate, an RF matching circuit inserted between the drain of the FET and an RF terminal, and an IF matching circuit inserted between the drain and an IF terminal. The source of the FET is grounded. The impedance of the RF matching circuit seen from the drain of the FET at an IF frequency is open-circuit, and the impedance of the IF matching circuit seen from the drain of the FET at an RF frequency is open-circuit.
1. A mixer circuit, comprising:
a transistor comprising a control terminal, a first output terminal, and a second output terminal, wherein the second output terminal is grounded;
a local oscillation (LO) terminal connected to the control terminal and to which an LO signal is input;
a high frequency (RF) terminal connected to the first output terminal and from which a high-frequency signal is output;
an intermediate frequency (IF) terminal connected to the first output terminal and from which an IF signal is output;
an LO matching circuit connected between the control terminal and the LO terminal;
a bias circuit connected to the control terminal and applies a bias voltage to the control terminal;
an RF matching circuit connected between the first output terminal and the RF terminal, wherein the RF matching circuit comprises a first distributed constant circuit having a first plurality of transmission lines; and
an IF matching circuit connected between the first output terminal and the IF terminal, wherein the IF matching circuit comprises a second distributed constant circuit having a second plurality of transmission lines, wherein a first impedance of the RF matching circuit measured from the first output terminal at an intermediate frequency is open-circuit, and wherein a second impedance of the IF matching circuit measured from the first output terminal at an RF frequency is open-circuit.
2. The mixer circuit according to claim 1 , wherein:
the RF matching circuit further comprises:
a series capacitor connected in series to the first distributed constant circuit, wherein the first output terminal of the transistor is connected to a first end of the series capacitor, and
the IF matching circuit further comprises:
a first transmission line that has a length equal to a quarter wavelength of the RF frequency, wherein the first transmission line is connected between the first output terminal of the transistor and the second distributed constant circuit; and
a second transmission line that has a length equal to the quarter wavelength of the RF frequency, wherein the second transmission line is located at a connection point at which the first transmission line is connected to the second distributed constant circuit.
3. The mixer circuit according to claim 2 , wherein the second transmission line is open at one end.
4. The mixer circuit according to claim 1 , wherein:
the RF matching circuit further comprises:
a third transmission line having a length equal to a quarter wavelength of the intermediate frequency, the third transmission line is between the first output terminal of the transistor and the first distributed constant circuit; and
a fourth transmission line having a length equal to the quarter wavelength of the intermediate frequency, the fourth transmission line is at a connection point at which the third transmission line is connected to the first distributed constant circuit; and
the IF matching circuit further comprises:
a first transmission line having a length equal to a quarter wavelength of the RF frequency, the first transmission line is between the first output terminal of the transistor and the second distributed constant circuit; and
a second transmission line having a length equal to a quarter wavelength of the RF frequency, the second transmission line is at a connection point at which the first transmission line is connected to the second distributed constant circuit.
5. The mixer circuit according to claim 4 , wherein the fourth transmission line is open at one end, and wherein the second transmission line is open at one end.
6. The mixer circuit according to claim 1 , wherein the first plurality of transmission lines comprises at least one transmission line that is open at one end.
7. The mixer circuit according to claim 1 , wherein a second wherein the second plurality of transmission lines comprises at least one transmission line that is open at one end.
8. The mixer circuit according to claim 1 , wherein the transistor is a field effect transistor.
9. A mixer circuit, comprising:
a transistor comprising a gate, a first output, and a second output;
a local oscillation (LO) terminal connected to the gate through an LO matching circuit;
a high frequency (RF) terminal connected to the first output through an RF matching circuit, wherein the RF matching circuit comprises a first distributed constant circuit having a first plurality of transmission lines, wherein a first impedance of the RF matching circuit measured from the first output at an intermediate frequency indicates an open-circuit;
an intermediate frequency (IF) terminal connected to the first output through an IF matching circuit, wherein the IF matching circuit comprises a second distributed constant circuit having a second plurality of transmission lines, and wherein a second impedance of the IF matching circuit measured from the first output at an RF frequency indicates an open-circuit; and
a bias circuit connected to the gate.
10. The mixer circuit of claim 9 , wherein the second output is grounded.
11. The mixer circuit of claim 9 , wherein a LO signal is input into the LO terminal.
12. The mixer circuit of claim 9 , wherein a high-frequency signal is output from the RF terminal.
13. The mixer circuit of claim 9 , wherein an IF signal is output from the IF terminal.
14. The mixer circuit of claim 9 , wherein the bias circuit applies a bias voltage to the gate.
15. The mixer circuit of claim 9 , wherein the RF matching circuit further comprises:
a series capacitor, wherein a first end of the series capacitor is connected in series to the first distributed constant circuit, and the first output of the transistor is connected to a second end of the series capacitor.
16. The mixer circuit of claim 9 , wherein the IF matching circuit further comprises:
a first transmission line that has a length equal to a quarter wavelength of the RF frequency, wherein the first transmission line is connected between the first output of the transistor and the second distributed constant circuit; and
a second transmission line that has a length equal to the quarter wavelength of the RF frequency, wherein the second transmission line is located at a connection point at which the first transmission line is connected to the second distributed constant circuit, and wherein the second transmission line is open at one end.
17. The mixer circuit according to claim 9 , wherein the RF matching circuit further comprises:
a third transmission line having a length equal to a quarter wavelength of the intermediate frequency, the third transmission line is between the first output of the transistor and the first distributed constant circuit; and
a fourth transmission line having a length equal to the quarter wavelength of the intermediate frequency, the fourth transmission line is at a connection point at which the third transmission line is connected to the first distributed constant circuit, and the fourth transmission line is open at one end.