IP Library › Granted Patent US 11,101,784
Granted Patent B2
US 11,101,784 · App. 15/776,360 · Granted Aug 24, 2021

Electrical component with heat dissipation

Inventors: Maximilian Schiek (Munich, DE); Bernhard Bader (Neubiberg, DE); Christian Ceranski (Munich, DE); Tomasz Jewula (Markt Schwaben, DE)
Assignee: SnapTrack, Inc.
H03H9/02622H01L23/36H03H3/10H03H9/02055H03H9/02102H03H9/02834H03H9/0523H03H9/08
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Quick Facts
Patent No.
US 11,101,784
App. No.
15/776,360
Granted
Aug 24, 2021
Kind
B2
Abstract

In order to improve heat dissipation from electrical components with heat-generating component structures, it is proposed to provide a radiation layer with a large surface in the area of the component structures. Preferably, the radiation layer is very heat-conductive or in heat-conductive connection with the component structures.

Claims (17)

1. An electrical component with improved heat dissipation having a chip (CH) comprising a heat-loss generating element with an on-chip heat radiation layer (ASS) applied in thermal contact with the heat-loss generating element, wherein:

the heat radiation layer has a roughened surface;

the heat radiation layer (ASS) is applied to a first surface area (SA 1 ) of the chip;

the heat-loss generating element is arranged on a second surface area (SA 2 ) of the chip;

the first and second surface areas are arranged side by side; and

a heat conducting layer (WLS) extends over the first and second surface areas (SA 1 , SA 2 ), forming a heat-dissipation path on the chip (CH) but beneath the heat radiation layer (ASS) and the heat-loss generating element.

2. The electrical component according to claim 1 , in which the heat radiation layer (ASS) has a columnar structure and is designed as a polycrystalline or crystalline layer.

3. The electrical component according to claim 2 , in which the heat radiation layer (ASS) is an AIN layer, which is further enlarged by crystal-oriented back-etching in the roughened surface.

4. The electrical component according to claim 1 , in which a cover layer (CL), on which the heat radiation layer (ASS) is arranged, extends over the heat-loss generating element.

5. The electrical component according to claim 4 , in which the cover layer (CL) is part of a thin-film package, which is generated directly on the chip (CH) and forms a cavity for the heat-loss generating element.

6. The electrical component according to claim 5 , in which the cover layer (CL) rests over the cavity and terminates adjacent to the cavity with a surface of the chip.

7. The electrical component according to claim 1 , in which the chip comprises a BAW or FBAR resonator, and in which the heat radiation layer (ASS) is applied directly to an uppermost layer of the BAW or FBAR resonator.

8. The electrical component according to claim 1 , in which the chip comprises a piezoelectric substrate and component structures (BES) arranged thereon, which are designed for generating, converting, propagating or reflecting surface acoustic waves (SAW), and in which the heat radiation layer (ASS) is applied directly to the piezoelectric substrate in the first surface area (SA 1 ) adjacent to the component structures (BES), wherein the first surface area does not extend into an acoustic path of the surface acoustic waves.

9. The electrical component according to claim 1 , in which the chip comprises a semiconductor substrate and component structures (BES) arranged thereon and/or integrated therein, and in which the chip is a semiconductor device.

10. The electrical component according to claim 9 , in which the chip comprises an integrated circuit.

11. The electrical component according to claim 9 , in which the chip is mounted in a flip-chip arrangement on a carrier so that a surface with the component structures (BES) and the heat radiation layer (ASS) faces the carrier (TR), and in which a further heat radiation layer (ASSw) is applied to a surface of the carrier (TR) facing the chip (CH).

12. The electrical component according to claim 1 , in which the chip comprises a BAW or FBAR resonator.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 20, 2018
From: TDK CORPORATION; TDK ELECTRONICS AG
To: SNAPTRACK, INC.
Reel/Frame 047553/0476 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 15, 2018
From: SCHIEK, MAXIMILIAN; BADER, BERNHARD; CERANSKI, CHRISTIAN; JEWULA, TOMASZ
To: EPCOS AG
Reel/Frame 045811/0796 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 15, 2018
From: EPCOS AG
To: SNAPTRACK, INC.
Reel/Frame 046179/0001 →
Priority Claims (1)
DE 102015120341.3 · Nov 24, 2015 · national
Continuity (1)
Related Publication 20200259477A1 · Aug 13, 2020