High voltage semiconductor device and manufacturing method thereof
A high voltage semiconductor device includes a semiconductor substrate, a first doped well, a second doped well, a mixed doped well, and a gate structure. The first, the second, and the mixed doped wells are disposed in the semiconductor substrate. At least a part of the first doped well and at least a part of the second doped well are located at two opposites sides of the gate structure in a horizontal direction respectively. The mixed doped well are located between the first doped well and the second doped well. The first and the second doped well include a first conductivity type dopant and a second conductivity type dopant respectively. The mixed doped well includes a mixed dopant. A part of the mixed dopant is identical to the first conductivity type dopant, and another part of the mixed dopant is identical to the second conductivity type dopant.
1. A high voltage semiconductor device, comprising:
a semiconductor substrate;
a gate structure disposed on the semiconductor substrate;
a first doped well disposed in the semiconductor substrate, wherein the first doped well comprises a first conductivity type dopant;
a second doped well disposed in the semiconductor substrate, wherein the second doped well comprises a second conductivity type dopant, and at least a part of the first doped well and at least a part of the second doped well are located at two opposite sides of the gate structure in a horizontal direction respectively;
a mixed doped well disposed in the semiconductor substrate, wherein the mixed doped well is located between the first doped well and the second doped well in the horizontal direction, and the mixed doped well comprises a mixed dopant, wherein a part of the mixed dopant is identical to the first conductivity type dopant, and another part of the mixed dopant is identical to the second conductivity type dopant;
a drain doped region disposed in the first doped well; and
a source doped region disposed in the second doped well, wherein the drain doped region and the source doped region are located at the two opposite sides of the gate structure in the horizontal direction respectively, and a ratio of a length of the mixed doped well in the horizontal direction to a distance between the source doped region and the mixed doped well in the horizontal direction ranges from 0.8 to 1.
2. The high voltage semiconductor device according to claim 1 , wherein the mixed doped well directly contacts the first doped well and the second doped well.
3. The high voltage semiconductor device according to claim 1 , wherein a conductivity type of the first doped well is complementary to a conductivity type of the second doped well.
4. The high voltage semiconductor device according to claim 1 , wherein the gate structure overlaps the mixed doped well in a thickness direction of the semiconductor substrate.
5. The high voltage semiconductor device according to claim 1 , further comprising:
a mask layer disposed on the semiconductor substrate, wherein the first doped well is partially located between the drain doped region and the mixed doped well, and the mask layer directly contacts the drain doped region.
6. The high voltage semiconductor device according to claim 5 , further comprising:
an opening penetrating the mask layer, wherein the opening is located above the first doped well.
7. The high voltage semiconductor device according to claim 6 , wherein a ratio of a length of the opening in the horizontal direction to a distance between the drain doped region and the gate structure in the horizontal direction ranges from 0.1 to 0.5.
8. The high voltage semiconductor device according to claim 1 , wherein the gate structure overlaps a part of the first doped well and a part of the second doped well in a thickness direction of the semiconductor substrate.