IP Library Granted Patent US 11,120,885
Granted Patent B2
US 11,120,885 · App. 17/100,582 · Granted Sep 14, 2021

Using a status indicator in a memory sub-system to detect an event

Inventors: Michael G. Miller (Boise, ID); Kishore Kumar Muchherla (Fremont, CA); Harish R. Singidi (Fremont, CA); Walter Di Francesco (Avezzano, IT); Renato C. Padilla (Folsom, CA); Gary F. Besinga (Boise, ID); Violante Moschiano (Avezzano, IT)
Assignee: Micron Technology, Inc.
G11C16/3495G06F12/0246G11C16/04G11C29/50004G11C29/52
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Quick Facts
Patent No.
US 11,120,885
App. No.
17/100,582
Granted
Sep 14, 2021
Kind
B2
Abstract

An indication of an initialization of power to a memory device is received. Responsive to receiving the indication of the initialization of power to the memory device, whether a status indicator associated with a written page of the memory device can be read is determined. Responsive to determining that the status indicator cannot be read, a programming of data to the memory device did not complete based on a prior loss of power to the memory device is determined.

Claims (58)

1. A method comprising:

receiving an indication of an initialization of power to a memory device;

responsive to receiving the indication of the initialization of power to the memory device, determining whether a status indicator associated with a written page of the memory device can be read; and

responsive to determining that the status indicator cannot be read, determining that programming of data to the memory device did not complete based on a prior loss of power to the memory device.

2. The method of claim 1 , wherein the written page of the memory device is a last written page of a block of the memory device.

3. The method of claim 1 , further comprising:

responsive to determining that the programming of the data to the memory device did not complete based on the prior loss of power to the memory device:

recovering a portion of the data programmed to one or more locations of the memory device;

invalidating the portion of the data at the one or more locations of the memory device; and

programming one or more other locations of the memory device with the portion of the data.

4. The method of claim 1 , further comprising:

responsive to determining that the status indicator can be read, determining that the programming of the data to the memory device did complete and there is a data retention loss.

5. The method of claim 4 , further comprising:

responsive to determining that the programming of the data to the memory device did complete and there is the data retention loss:

reading the data programmed to the memory device, the data being at first locations of the memory device;

programming the data to second locations different than the first locations of the memory device; and

invalidating the data at the first locations.

6. The method of claim 1 , wherein the status indicator is moved from a first location to a second location of the memory device after completion of a second pass of a two-pass programming operation.

7. The method of claim 1 , further comprising:

identifying the written page of the memory device, wherein the identifying comprises:

identifying that a data block of the written page is open based on another status indicator, wherein the data block is open when a two-pass programming operation has not completed on the data block.

8. The method of claim 1 , wherein the prior loss of power is an asynchronous power loss of the memory device.

9. A system comprising:

a memory device; and

a processing device, operatively coupled with the memory device, to:

receive an indication of an initialization of power to the memory device;

responsive to receiving the indication of the initialization of power to the memory device, determine whether a status indicator associated with a written page of the memory device can be read; and

responsive to determining that the status indicator cannot be read, determining that programming of data to the memory device did not complete based on a prior loss of power to the memory device.

10. The system of claim 9 , wherein the processing device is further to:

responsive to determining that the programming of the data to the memory device did not complete based on the prior loss of power to the memory device:

recover a portion of the data programmed to one or more locations of the memory device;

invalidate the portion of the data at the one or more locations of the memory device; and

program one or more other locations of the memory device with the portion of the data.

11. The system of claim 9 , wherein the processing device is further to:

responsive to determining that the status indicator can be read, determine that the programming of the data to the memory device did complete and there is a data retention loss.

12. The system of claim 11 , wherein the processing device is further to:

responsive to determining that the programming of the data to the memory device did complete and there is the data retention loss:

read the data programmed to the memory device, the data being at first locations of the memory device;

program the data to second locations different than the first locations of the memory device; and

invalidate the data at the first locations.

13. The system of claim 9 , wherein the status indicator is moved from a first location to a second location of the memory device after completion of a second pass of a two-pass programming operation.

14. The system of claim 9 , wherein the written page of the memory device is a last written page of a block of the memory device.

15. The system of claim 9 , wherein the processing device is further to:

identify the written page of the memory device, wherein to identify the written page the processing device is to:

identify that a data block of the written page is open based on another status indicator, wherein the data block is open when a two-pass programming operation has not completed on the data block.

16. The system of claim 9 , wherein the prior loss of power is an asynchronous power loss of the memory device.

17. A non-transitory computer-readable storage medium comprising storing instructions that, when executed by a processing device, cause the processing device to perform operations comprising:

receiving an indication of an initialization of power to a memory device;

responsive to receiving the indication of the initialization of power to the memory device, determining whether a status indicator associated with a written page of the memory device can be read; and

responsive to determining that the status indicator cannot be read, determining that programming of data to the memory device did not complete based on a prior loss of power to the memory device.

18. The non-transitory computer-readable storage medium of claim 17 , the operations further comprising:

responsive to determining that the programming of the data to the memory device did not complete based on the prior loss of power to the memory device:

recovering a portion of the data programmed to one or more locations of the memory device;

invalidating the portion of the data at the one or more locations of the memory device; and

programming one or more other locations of the memory device with the portion of the data.

19. The non-transitory computer-readable storage medium of claim 18 , to the operations further comprising:

responsive to determining that the status indicator can be read, determining that the programming of the data to the memory device did complete and there is a data retention loss.

20. The non-transitory computer-readable storage medium of claim 17 , wherein the prior loss of power is an asynchronous power loss of the memory device, and wherein the written page of the memory device is a last written page of a block of the memory device.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 20, 2020
From: MILLER, MICHAEL G.; MUCHHERLA, KISHORE KUMAR; SINGIDI, HARISH R.; DI FRANCESCO, WALTER; PADILLA, RENATO C.; BESINGA, GARY F.; MOSCHIANO, VIOLANTE
To: MICRON TECHNOLOGY, INC.
Reel/Frame 054436/0959 →
Continuity (3)
Continuation 16820636 · Mar 16, 2020
Continuation 16040382 · Jul 19, 2018
Related Publication 20210074374A1 · Mar 11, 2021