IP Library › Granted Patent US 11,125,615
Granted Patent B2
US 11,125,615 · App. 16/540,724 · Granted Sep 21, 2021

Data output device

Inventors: Yun Jae Suh (Suwon-si, KR); Sung Ho Kim (Yongin-si, KR); Jun Seok Kim (Hwaseong-si, KR)
Assignee: SAMSUNG ELECTRONICS CO., LTD.
G01J1/44G01J1/0238H03F3/45071G01J1/18G01J2001/446
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Quick Facts
Patent No.
US 11,125,615
App. No.
16/540,724
Granted
Sep 21, 2021
Kind
B2
Abstract

A data output device is provided. The data output device includes a converter circuit configured to generate a conversion signal based on an output signal; a boosting circuit configured to generate a boosting signal based on the output signal; and an output circuit configured to generate the output signal based on an input signal and a feedback signal, the feedback signal being based on the conversion signal and the boosting signal.

Claims (51)

1. A data output device comprising:

an output circuit configured to generate an output signal based on an input signal received from a first node and a feedback signal;

a current source connected to a second node for outputting the output signal, and configured to supply a bias current to the output circuit;

a converter circuit including at least one transistor connected to the second node, and configured to generate a conversion signal based on the output signal; and

a boosting circuit including at least one transistor connected between the first node and the second node, and configured to generate the feedback signal based on the conversion signal.

2. The data output device of claim 1 , wherein the output circuit comprises an amplifying transistor, and

a gate node of the amplifying transistor is connected to the first node and a source node of the amplifying transistor is connected to a ground.

3. The data output device of claim 1 , wherein the input signal comprises a light signal generated by a photo element.

4. The data output device of claim 3 , wherein the output circuit generates the output signal by removing the feedback signal from the input signal.

5. The data output device of claim 1 , wherein the boosting circuit generates the feedback signal by amplifying the conversion signal, based on the number of transistors connected in series from the first node to the second node.

6. The data output device of claim 1 , wherein the converter circuit comprises a converting transistor, and

a gate node of the converting transistor receives the output signal and a drain node of the converting transistor is connected to a bias supply.

7. The data output device of claim 1 , wherein the converter circuit generates the conversion signal by log-scaling a change rate of the input signal, during an operation of the converter circuit in a sub-threshold region.

8. The data output device of claim 1 , wherein the boosting circuit comprises a first transistor and a second transistor,

a drain node of the first transistor receives the conversion signal and a source node of the first transistor is connected to the first node, and

a drain node of the second transistor is connected to the second node and a source node of the second transistor is connected to the output circuit.

9. The data output device of claim 8 , wherein the first transistor and the second transistor comprise an n-channel metal oxide semiconductor (NMOS) transistor,

a gate node of the first transistor is connected to a source node of the second transistor.

10. The data output device of claim 8 , wherein the first transistor and the second transistor comprise a p-channel metal oxide semiconductor (PMOS) transistor,

a gate node of the first transistor is connected to a drain node of the second transistor.

11. The data output device of claim 1 , wherein the boosting circuit generates the feedback signal by amplifying the conversion signal based on the number of the at least one transistor provided in the boosting circuit, during an operation of the boosting circuit in a sub-threshold region.

12. A data output device comprising:

a converter circuit configured to generate a conversion signal based on a first output signal;

a boosting circuit configured to generate a boosting signal based on the first output signal,

wherein the boosting circuit comprises a first transistor and a second transistor,

a gate node of the first transistor is connected to a source node of the second transistor, and

a gate node of the second transistor is connected to a drain node of the first transistor;

an output circuit configured to generate a second output signal based on a feedback signal and an input signal, the feedback signal being based on the conversion signal and the boosting signal, the input signal output from an output node of a photo element,

wherein the output circuit comprises an amplifying transistor connected between the second transistor and a ground,

a gate node of the amplifying transistor is connected to the output node of the photo element.

13. The data output device of claim 12 , wherein the second output signal is fed back to the converter circuit as the first output signal.

14. The data output device of claim 12 , wherein the converter circuit comprises a third transistor connected between a power voltage and the first transistor,

a gate node of the third transistor receives the first output signal.

15. The data output device of claim 12 , wherein the feedback signal has a magnitude which is proportional to a change in a voltage of the first output signal.

16. The data output device of claim 12 , wherein the output circuit generates the second output signal by removing the feedback signal from the input signal.

17. The data output device of claim 12 , wherein the drain node of the first transistor is connected to the converter circuit,

a source node of the first transistor is connected to the output node of the photo element,

a drain node of the second transistor is connected to a output node for outputting the first and second output signals, and

the source node of the second transistor is connected to the ground.

18. The data output device of claim 12 , wherein a source node of the first transistor is connected to the converter circuit,

the drain node of the first transistor is connected to the output node of the photo element,

the source node of the second transistor is connected to an output node for outputting the first and second output signals, and

a drain node of the second transistor is connected to the ground.

19. A sensing element comprising:

an event detector comprising a photodiode and a plurality of transistors, the photodiode being configured to generate an input signal corresponding to a change in an intensity of incident light,

wherein the event detector is configured to generate a first output signal based on the input signal received from an input node, amplify the first output signal to generate a feedback signal, generate a second output signal based on the input signal and the feedback signal, and output the second output signal via an output node; and

an event signal generator configured to generate an event signal corresponding to the second output signal, and output the event signal to an output interface,

wherein the event detector is configured to generate the feedback signal by amplifying the first output signal based on the number of transistors connected in series from the input node to the output node.

20. The sensing element of claim 19 , wherein the event detector comprises a converter circuit and a boosting circuit,

the converter circuit generates a conversion signal by performing a current-voltage conversion of the input signal, and

the boosting circuit generates the feedback signal based on the conversion signal.

Priority Claims (1)
KR 10-2016-0110492 · Aug 30, 2016 · national
Continuity (2)
Continuation 15436108 · Feb 17, 2017
Related Publication 20190368924A1 · Dec 5, 2019