Method for forming an interconnection structure

1. A method for forming an interconnection structure for a semiconductor device, the method comprising:

forming a conductive layer on an insulating layer;

forming at least a first via hole in the insulating layer, the at least one first via hole extending through the insulating layer to a respective underlying conductive structure. wherein forming the conductive layer comprises depositing the conductive layer to cover the insulating layer and filling at least one of the at least a first via hole:

forming a first set of mandrel lines of a first material above the conductive layer, wherein a mandrel line of the first set of mandrel lines extends across the at least a first via hole, wherein an upper surface of the deposited conductive layer presents a varying topography in a first region above the at least a first via hole, and wherein forming the first set of mandrel lines comprises aligning the first set of mandrel lines using the varying topography in the first region such that the mandrel line of the first set of mandrel lines runs above the first region;

forming a set of spacer lines of a second material different from the first material, wherein the set of spacer lines are formed on sidewalls of the first set of mandrel lines;

forming a second set of mandrel lines of a third material different from the first and second materials, wherein the second set of mandrel lines fill gaps between spacer lines of the set of spacer lines;

cutting at least a first mandrel line of the second set of mandrel lines into two line segments separated by a gap by etching the first mandrel line of the second set of mandrel lines selectively to the set of spacer lines and the first set of mandrel lines;

cutting at least a first mandrel line of the first set of mandrel lines into two line segments separated by a gap by etching the first mandrel line of the first set of mandrel lines selectively to the set of spacer lines and the second set of mandrel lines;

removing the set of spacer lines, selectively to the first and second sets of mandrel lines, thereby forming an alternating pattern of mandrel lines of the first set and mandrel lines of the second set; and

patterning the conductive layer to form a set of conductive lines, wherein the patterning comprises etching while using the alternating pattern of mandrel lines as an etch mask.

2. The method according to claim 1 , wherein cutting the first mandrel line of the first set of mandrel lines comprises:

forming a first cut mask above the first set of mandrel lines, the second set of mandrel lines and the set of spacer lines;

patterning an opening in the first cut mask, the opening exposing a portion of the first mandrel line of the first set of mandrel lines and having a width greater than a line width of the first mandrel line of the first set of mandrel lines, and

removing the portion of the first mandrel line of the first set of mandrel lines by etching through the opening of the first cut mask.

3. The method according to claim 1 , wherein cutting the first mandrel line of the second set of mandrel lines comprises:

forming a second cut mask above the first set of mandrel lines, the second set of mandrel lines, and the set of spacer lines;

patterning an opening in the second cut mask, the opening exposing a portion of the first mandrel line of the second set of mandrel lines and having a width greater than a line width of the first mandrel line of the second set of mandrel lines: and

removing the portion of the first mandrel line of the second set of mandrel lines by etching through the opening of the second cut mask.

4. The method according to claim 1 , wherein forming the first set of mandrel lines comprises:

forming a first mandrel layer of the first material; and

patterning the first mandrel layer to form the first set of mandrel lines, wherein the patterning comprises etching the first mandrel layer while using a second set of spacer lines as an etch mask.

5. The method according to claim 1 , wherein the first and third material are different materials selected from: a carbon-comprising material, a silicon-comprising material, and wherein the second material is an oxide material or a nitride material.

6. The method according to claim 1 , wherein the conductive layer include a layer of ruthenium (Ru), aluminum (Al), tungsten (W), iridium (sr), copper (Cu), cobalt (Co), titanium (Ti), gold (Au), silver (Ag), nickel (Ni) or two or more layers of any of the aforementioned metals.

7. The method according to claim 1 , wherein the conductive layer is a Ru-layer.

8. The method according to claim 1 , wherein the conductive layer is CVD, atomic layer deposition (ALD), PVD (Physical Vapor Deposition) or electroplated.

9. The method according to claim 1 , further comprising forming an intermediate target layer on the conductive layer, wherein the first set of mandrel lines are formed on the intermediate target layer, and wherein the patterning of the conductive layer comprises patterning the intermediate target layer by etching while using the alternating pattern defined by the first and second sets of mandrel lines as an etch mask, and thereafter etching the conductive layer while using at least the patterned intermediate target layer as an etch mask.

10. A method according to claim 1 , further comprising forming a further insulating layer covering the insulating layer and embedding the set of conductive lines.