Method of controlling initialization of nonvolatile memory device and memory system including nonvolatile memory device

1. A method of controlling initialization of a first nonvolatile memory device included in a memory system, the memory system including at least the first nonvolatile memory device and a second nonvolatile memory device having a greater speed associated with performing a read operation than that of the first nonvolatile memory device, the method comprising:

storing information data for initialization of the first nonvolatile memory device in the first nonvolatile memory device before assembling the memory system;

moving the information data from the first nonvolatile memory device to the second nonvolatile memory device after assembling the memory system; and

initializing the first nonvolatile memory device based on the information data stored in the second nonvolatile memory device.

2. The method of claim 1 , wherein the first nonvolatile memory device is a NAND flash memory device and the second nonvolatile memory device is a phase change random access memory (PRAM) device.

3. The method of claim 1 , further comprising:

converting a memory region of the first nonvolatile memory device associated with storing the information data to a memory region storing user data after moving the information data from the first nonvolatile memory device to the second nonvolatile memory device.

4. The method of claim 1 , wherein the moving moves the information data to a memory region of the second nonvolatile memory device such that a size of the memory region of the second nonvolatile memory device storing the information data is smaller than a size of a memory region of the first nonvolatile memory device associated with storing the information data.

5. The method of claim 1 , wherein the moving moves the information data to the second nonvolatile memory device such that a size of the information data stored in the second nonvolatile memory device is equal to a size of the information data previously stored in the first nonvolatile memory device.

6. The method of claim 1 , wherein

the storing includes storing the information data repeatedly N times in the first nonvolatile memory device before assembling the memory system, where N is an integer greater than one, and

the moving includes storing the information data repeatedly N times in the second nonvolatile memory device after assembling the memory system.

7. The method of claim 1 , wherein the moving moves the information data to the second nonvolatile memory device such that a size of the information data stored in the second nonvolatile memory device is smaller than a size of the information data previously stored in the first nonvolatile memory device.

8. The method of claim 1 , wherein

the storing includes storing the information data repeatedly N times in the first nonvolatile memory device before assembling the memory system where N is an integer greater than one, and

the moving includes storing the information data repeatedly M times in the second nonvolatile memory device after assembling the memory system, where M is an integer smaller than N.

9. The method of claim 1 , wherein the moving the information data comprises:

reading the information data from the first nonvolatile memory device; and

storing the information data read from the first nonvolatile memory device in the second nonvolatile memory device without verifying a validity of the information data read from the first nonvolatile memory device.

10. The method of claim 1 , wherein the moving the information data comprises:

reading the information data from the first nonvolatile memory device;

verifying a validity of the information data read from the first nonvolatile memory device to generate error-corrected information data; and

storing the error-corrected information data in the second nonvolatile memory device.

11. The method of claim 1 , further comprising:

receiving the information data through a wafer test after the first nonvolatile memory device is integrated in a wafer and before the first nonvolatile memory device is cut from the wafer.

12. The method of claim 11 , further comprising:

pre-assembly initializing the first nonvolatile memory device based on the information data stored in the first nonvolatile memory device, after cutting the first nonvolatile memory device from the wafer and before assembling the first nonvolatile memory device in the memory system;

performing a single-device test of the first nonvolatile memory device after pre-assembly initializing the first nonvolatile memory device; and

providing special data for an operation of the first nonvolatile memory device based on results of the single-device test.

13. The method of claim 12 , further comprising:

storing the special data in the second nonvolatile memory device.

14. The method of claim 13 , wherein storing the special data comprises:

storing the special data from a tester device in the first nonvolatile memory device before assembling the memory system; and

moving the special data from the first nonvolatile memory device to the second nonvolatile memory device after assembling the memory system.

15. A memory system comprising;

a first nonvolatile memory device configured to store information data for initialization of the first nonvolatile memory device before assembling the first nonvolatile memory device in the memory system;

a second nonvolatile memory device having a greater speed associated with performing a read operation than that of the first nonvolatile memory device; and

a controller configured to,

move the information data from the first nonvolatile memory device to the second nonvolatile memory device after assembling the memory system, and

initialize the first nonvolatile memory device based on the information data stored in the second nonvolatile memory device.

16. The memory system of claim 15 , wherein the first nonvolatile memory device is a NAND flash memory device and the second nonvolatile memory device is a phase change random access memory (PRAM) device.

17. The memory system of claim 15 , wherein the memory system is configured to communicate with a testing device, the testing device configured to provide the information data through a wafer test after the first nonvolatile memory device is integrated in a wafer and before the first nonvolatile memory device is cut from the wafer.

18. A method of controlling initialization of a NAND flash memory device included in a memory system, the method comprising:

providing information data for initialization of the NAND flash memory device through a wafer test after the NAND flash memory device is integrated in a wafer and before the NAND flash memory device is cut from the wafer;

storing the information data in the NAND flash memory device before assembling the memory system;

moving the information data from the NAND flash memory device to a PRAM device included in the memory system after assembling the memory system;

initializing the NAND flash memory device based on the information data stored in the PRAM device; and

converting a memory region of the NAND flash memory device associated with storing the information data to a memory region storing user data after moving the information data from the NAND flash memory device to the PRAM device.

19. The method of claim 18 , wherein the providing the information data comprises:

performing the wafer test after the NAND flash memory device is integrated in the wafer and before the NAND flash memory device is cut from the wafer.