IP Library › Granted Patent US 11,132,659
Granted Patent B2
US 11,132,659 · App. 14/799,341 · Granted Sep 28, 2021

Tamper detection

Inventors: Erkan Bilhan (Dallas, TX); Rajitha Padakanti (Plano, TX); Amritpal Singh Mundra (Allen, TX)
Assignee: Texas Instruments Incorporated
G06Q20/206G07F19/2055
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Quick Facts
Patent No.
US 11,132,659
App. No.
14/799,341
Granted
Sep 28, 2021
Kind
B2
Abstract

A financial transaction system includes sensors, a tamper detection module, and circuitry configurable to control which sensors are used, and the circuitry is configurable after the tamper detection module has been manufactured.

Claims (47)

1. A method of operating a transaction system, comprising:

writing, by a processor, control information to registers in a tamper detection module, the tamper detection module coupled to a plurality of sensors, where the control information written to the registers comprises information:

determining which of the plurality of sensors are active; and

determining a tamper condition under which a tamper trigger signal is generated;

using a state machine of the tamper detection module, monitoring one or more active sensors, and, in response to the monitored sensors indicating a tampering condition, generating a tamper trigger signal; and

responsive to a tamper trigger signal, storing, in a memory circuit, a last state before the tamper trigger signal at the one or more active sensors.

2. The method of claim 1 , wherein the control information indicates a mode of operation of the state machine for the monitoring of the sensors.

3. The method of claim 2 , wherein the mode of operation determines whether the monitoring uses a window of time.

4. The method of claim 3 , wherein the monitoring of the sensors is performed according to the mode of operation indicated by the control information;

wherein, responsive to the mode of operation indicating not to use a window of time, the monitoring includes:

counting, using the state machine, a number of failures indicated by a first sensor of the sensors; and

generating the tamper trigger signal in response to the number of failures exceeding a threshold.

5. The method of claim 4 , wherein the control information indicates the threshold.

6. The method of claim 3 , wherein the monitoring of the sensors is performed according to the mode of operation indicated by the control information; and

wherein response to the mode of operation indicating to use a window of time, the monitoring includes:

counting, using the state machine, a number of failures indicated by a first sensor of the sensors within the window of time; and

generating the tamper trigger signal in response to the number of failures within the window of time exceeding a threshold.

7. The method of claim 6 , wherein the control information indicates a duration of the window of time and the threshold.

8. The method of claim 1 , further comprising:

taking an action in response to the tamper trigger signal, wherein the control information indicates an attribute of the action.

9. A system comprising:

a processor;

a set of registers coupled to the processor;

a state machine coupled to the set of registers; and

a memory circuit coupled to the state machine, wherein:

the system is operable to couple to a set of sensors;

the processor is operable to write control information to the set of registers, the control information comprising information that specifies a subset of the set of sensors that is enabled, and information that specifies a tampering condition under which a tamper trigger signal is generated;

the state machine is operable to monitor the subset of the set of sensors according to the control information and in response to the monitored sensors indicating a tampering condition, generate a tamper trigger signal; and

the system is operable to, in response to the tamper trigger signal, store, in the memory circuit, a last state before the tamper trigger signal.

10. The system of claim 9 , wherein the set of registers is memory mapped to the processor.

11. The system of claim 9 , wherein the control information indicates a mode of operation of the state machine for the monitoring of the subset of the set of sensors.

12. The system of claim 11 , wherein the mode of operation indicates whether the state machine uses a window of time in the monitoring of the subset of the set of sensors.

13. The system of claim 12 , wherein, when the mode of operation indicates not to use the window of time, the state machine is operable to monitor the subset of the set of sensors by:

counting a number of failures indicated by a first sensor of the subset of the set of sensors; and

generating the tamper trigger signal in response to the number of failures exceeding a threshold.

14. The system of claim 13 , wherein the control information indicates the threshold.

15. The system of claim 12 , wherein, when the mode of operation indicates to use the window of time, the state machine is operable to monitor the subset of the set of sensors by:

counting a number of failures indicated by a first sensor of the subset of the set of sensors within the window of time; and

generating the tamper trigger signal in response to the number of failures within the window of time exceeding a threshold.

16. The system of claim 15 , wherein the control information indicates a duration of the window of time and the threshold.

17. The method of claim 1 , wherein:

the tamper detection module includes a programmable input/output coupled to the registers and configured to couple to a switch; and

the control information written to the registers comprises information determining whether the registers provide an enable signal to the programmable input/output.

18. The system of claim 9 , wherein:

the system further comprises an input/output circuit operable to couple to a switch;

the control information further comprising information that specifies whether the set of registers provide an enable signal to the input/output circuit; and

the input/output circuit includes a NAND gate that includes a first input operable to couple to the switch and a second input coupled to the set of registers to receive the enable signal.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 3, 2015
From: BILHAN, ERKAN; PADAKANTI, RAJITHA; MUNDRA, AMRITPAL SINGH
To: TEXAS INSTRUMENTS INCORPORATED
Reel/Frame 036238/0143 →
Continuity (1)
Related Publication 20170017943A1 · Jan 19, 2017
Cited By (1)
US 12,395,502