Semiconductor device and method for fabricating the same
The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate; a plurality of landing pads disposed over the substrate, at least one of the plurality of landing pads comprising a protruding portion of a capacitor plug and a first spacer over the protruding portion, wherein a width of the first spacer is larger than a width of the capacitor plug; a plurality of bit line contacts disposed over the substrate and a plurality of bit lines respectively disposed over the plurality of bit line contacts. The bit line is an undulating stripe extending between two adjacent capacitor contacts; and a plurality of capacitor structures respectively disposed over the plurality of landing pads.
1. A semiconductor device, comprising:
a substrate;
a plurality of landing pads disposed over the substrate, wherein at least one of the plurality of landing pads comprising a protruding portion of a capacitor plug and a first spacer over the protruding portion, wherein a width of the first spacer is larger than a width of the capacitor plug;
a plurality of capacitor contacts positioned over the substrate, wherein the plurality of landing pads are disposed over the plurality of capacitor contacts, wherein at least one of the plurality of capacitor contacts having a neck portion and a head portion over the neck portion, wherein an upper width of the head portion is larger than an upper width of the neck portion;
a plurality of bit line contacts disposed over the substrate and a plurality of bit lines respectively disposed over the plurality of bit line contacts, wherein at least one of the plurality of bit lines is an undulating stripe extending between two adjacent capacitor contacts of the plurality of capacitor contacts, wherein a top surface of the at least one of the plurality of bit lines and a top surface of the head portion of at least one of the plurality of capacitor contacts are coplanar; and
a plurality of capacitor structures respectively disposed over the plurality of landing pads.
2. The semiconductor device of claim 1 , wherein the first spacer comprises metal silicide and is disposed on a sidewall of the protruding portion.
3. The semiconductor device of claim 1 , wherein the first spacer comprises polysilicon and is disposed on a sidewall of the protruding portion.
4. The semiconductor device of claim 3 , further comprising a second spacer disposed over the first spacer.
5. The semiconductor device of claim 4 , wherein the second spacer comprises metal silicide.
6. The semiconductor device of claim 1 , wherein the upper width of the head portion is larger than a bottom width of the head portion.
7. The semiconductor device of claim 1 , wherein the upper width of the neck portion is the same as a bottom width of the head portion.
8. The semiconductor device of claim 1 , wherein the head portion has a curved sidewall.
9. The semiconductor device of claim 1 , wherein the head portion has a tapered profile.