Method for fabricating semiconductor device
A method for fabricating semiconductor device includes the steps of: providing a substrate having a memory region and a periphery region; forming a first trench and a second trench in substrate on the memory region, in which a width of the second trench is greater than a width of the first trench; forming a first liner in the first trench and the second trench; forming a second liner on the first liner as the second liner completely fills the first trench and partly fills the second trench; and planarizing the second liner and the first liner to form a first isolation structure and a second isolation structure.
1. A method for fabricating semiconductor device, comprising:
providing a substrate having a memory region and a periphery region;
forming a first trench and a second trench in substrate on the memory region and a third trench and a fourth trench in the substrate on the periphery region, wherein a width of the second trench is greater than a width of the first trench, a width of the third trench is greater than a width of the second trench, and a width of the fourth trench is greater than a width of the third trench;
forming a first liner in the first trench, the second trench, the third trench, and the fourth trench;
forming a second liner on the first liner, wherein the second liner completely fills the first trench and partly fills the second trench; and
planarizing the second liner and the first liner in the first trench and the second trench to form a first isolation structure, a second isolation structure, a third isolation structure, and a fourth isolation structure.
2. The method of claim 1 , further comprising;
forming a third liner on the second liner;
forming a fourth liner on the third liner; and
planarizing the fourth liner, the third liner, the second liner, and the first liner to form the first isolation structure, the second isolation structure, the third isolation structure, and the fourth isolation structure.
3. The method of claim 2 , wherein the third liner and the fourth liner comprise different materials.
4. The method of claim 2 , wherein the third liner comprises silicon nitride and the fourth liner comprises silicon oxide.
5. The method of claim 1 , further comprising performing an atomic layer deposition (ALD) process to form the first liner.
6. The method of claim 1 , further comprising performing an in-situ steam generation (ISSG) process to form the second liner.
7. The method of claim 1 , wherein the first liner and the second liner comprise same material.
8. The method of claim 1 , wherein the first liner and the second liner comprise silicon oxide.