IP Library Granted Patent US 11,133,336
Granted Patent B2
US 11,133,336 · App. 16/626,420 · Granted Sep 28, 2021

Semiconductor device and manufacturing method of semiconductor device

Inventors: Yuto Yakubo (Kanagawa, JP); Toshinobu Asami (Kanagawa, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L27/1248H01L27/105H01L27/1211
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Quick Facts
Patent No.
US 11,133,336
App. No.
16/626,420
Granted
Sep 28, 2021
Kind
B2
Abstract

A semiconductor device having a large storage capacity per unit area is provided. The semiconductor device including a memory string, where the memory string includes a memory cell and a transistor; the memory cell includes a first conductor having a first opening, a first insulator provided inside the first opening, a second insulator provided inside the first insulator, a third insulator provided inside the second insulator, and a first oxide provided inside the third insulator; the transistor includes a second conductor having a second opening, the first insulator provided inside the second opening, the first oxide provided inside the first insulator, a fifth insulator provided inside the first oxide, and a third conductor provided inside the fifth insulator; the second conductor includes a region overlapping with the first oxide with the first insulator therebetween; and the third conductor includes a region overlapping with the first oxide with the fifth insulator therebetween.

Claims (28)

1. A semiconductor device comprising a memory string,

wherein the memory string comprises a memory cell and a transistor,

wherein the memory cell comprises:

a first conductor having a first opening;

a first insulator inside the first opening;

a second insulator provided inside the first insulator;

a third insulator provided inside the second insulator;

a first oxide provided inside the third insulator; and

a fourth insulator provided inside the first oxide,

wherein the transistor comprises:

a second conductor having a second opening;

the first insulator provided inside the second opening;

the third insulator provided inside the first insulator;

the first oxide provided inside the third insulator;

a fifth insulator provided inside the first oxide; and

a third conductor provided inside the fifth insulator,

wherein the second conductor comprises a region overlapping with the first oxide with the first insulator therebetween, and

wherein the third conductor comprises a region overlapping with the first oxide with the fifth insulator therebetween.

2. The semiconductor device according to claim 1 , wherein the second conductor functions as a first gate, and

wherein the third conductor functions as a second gate.

3. The semiconductor device according to claim 1 , wherein the first oxide comprises In, an element M (M is Al, Ga, Y, or Sn), and Zn.

4. The semiconductor device according to claim 1 , wherein the fourth insulator has a stacked-layer structure.

5. The semiconductor device according to claim 1 , wherein the semiconductor device comprises a base,

wherein the semiconductor device comprises a plurality of the memory cells over the base, and

wherein the plurality of the memory cells and the transistor are stacked in a direction perpendicular to one surface of the base.

6. The semiconductor device according to claim 5 , wherein the second insulator is formed over or under the third conductor in a direction perpendicular to one surface of the base.

7. The semiconductor device according to claim 1 , wherein the first insulator is an oxide comprising any one of silicon, aluminum, and hafnium.

8. The semiconductor device according to claim 1 , wherein the third insulator is an oxide comprising any one of silicon, aluminum, and hafnium.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 24, 2019
From: YAKUBO, YUTO; ASAMI, YOSHINOBU
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 051362/0740 →
Priority Claims (1)
JP JP2017-125126 · Jun 27, 2017 · national
Continuity (1)
Related Publication 20200144308A1 · May 7, 2020
Cited By (2)
US 12,444,466 US 12,696,461