Apparatus and method for loop flattening and reduction in a single instruction multiple data (SIMD) pipeline
An apparatus and method for loop flattening and reduction in a SIMD pipeline including broadcast, move, and reduction instructions. One embodiment of a processor comprises: a decoder to decode a broadcast instruction to generate a decoded broadcast instruction identifying a plurality of operations, the broadcast instruction including an opcode and first and second source operands, and having a split value associated therewith; and execution circuitry to execute the operations of the decoded broadcast instruction to copy a first data element specified by the first source operand to each of a first set of contiguous data element locations in a destination register and to copy a second data element specified by the second source operand to a second set of contiguous data element locations in the destination register, wherein the first and second sets of contiguous data element locations are determined in accordance with the split value.
1. A processor comprising:
a decoder to decode a broadcast instruction to generate a decoded broadcast instruction identifying a plurality of operations, the broadcast instruction including an opcode, a first source operand, and a second source operands, the broadcast instruction having a split value associated therewith; and
execution circuitry to execute the operations of the decoded broadcast instruction to copy a first data element specified by the first source operand to each of a first set of contiguous data element locations in a destination register and to copy a second data element specified by the second source operand to each of a second set of contiguous data element locations in the destination register,
wherein the execution circuitry is configured to determine the first set of contiguous data element locations and the second set of contiguous data element locations in accordance with the split value associated with the broadcast instruction.
2. The processor of claim 1 wherein the split value is to be included in an immediate of the broadcast instruction.
3. The processor of claim 1 wherein the split value is to be included as an operand of the broadcast instruction or read from a source register.
4. The processor of claim 1 wherein the split value comprises an integer value having a range of 0 to N-1, where N comprises a number of data element locations in the destination register.
5. The processor of claim 4 wherein the execution circuitry is configured to use the split value to identify an end of the first set of contiguous data element locations and/or a start of the second set of contiguous data element locations.
6. The processor of claim 1 wherein the broadcast instruction is to identify a mask field and the execution circuitry is configured to use the mask field to determine, for each data element location of the destination register, whether to write a mask value or one of the first and second data elements to the data element location.
7. The processor of claim 6 wherein the mask field is to be included in an immediate of the broadcast instruction or stored in a third source register.
8. The processor of claim 6 wherein the mask value comprises a packed data element comprising all zeroes or a packed mask value stored in a mask source register.
9. A method comprising:
decoding a broadcast instruction to generate a decoded broadcast instruction identifying a plurality of operations, the broadcast instruction including an opcode, a first source operand, and a second source operand, the broadcast instruction having a split value associated therewith; and
executing the plurality of operations of the decoded broadcast instruction including:
copying a first data element specified by the first source operand to each of a first set of contiguous data element locations in a destination register, and
copying a second number of contiguous data elements from the second source register data element specified by the second source operand to each of a second set of contiguous data element locations in the destination register,
wherein the first set of contiguous data element locations and the second set of contiguous data element locations are determined in accordance with the split value associated with the broadcast instruction.
10. The method of claim 9 wherein the split value is to be included in an immediate of the broadcast instruction.
11. The method of claim 9 wherein the split value is to be included as an operand of the broadcast instruction or read from a source register.
12. The method of claim 9 wherein the split value comprises an integer value having a range of 0 to N-1, where N comprises a number of data element locations in the destination register.
13. The method of claim 12 wherein the split value is to be used to identify and start r ding from thc second set of data cicmcnts an end of the first set of contiguous data element locations and/or a start of the second set of contiguous data element locations.
14. The method of claim 9 wherein the broadcast instruction is to identify a mask field, the mask field to be used to determine, for each data element location of the destination register, whether to write a mask value or one of the first and second data elements to the data element location.
15. The method of claim 14 wherein the mask field is to be included in an immediate of the broadcast instruction or stored in a third source register.
16. The method of claim 14 wherein the mask value comprises a packed data element comprising all zeroes or a packed mask value stored in a mask source register.
17. A non-transitory machine-readable medium having program code stored thereon which, when executed by a machine, causes the machine to perform the operations of:
decoding a broadcast instruction to generate a decoded broadcast instruction identifying a plurality of operations, the broadcast instruction including an opcode, a first source operand, and a second source operands, the broadcast instruction having a split value associated therewith; and
executing the plurality of operations of the decoded broadcast instruction including:
copying a first data element specified by the first source operand to each of a first set of contiguous data element locations in a destination register, and
copying a second data element specified by the second source operand to each of a second set of contiguous data element locations in the destination register,
wherein the first set of contiguous data element locations and the second set of contiguous data element locations are determined in accordance with the split value associated with the broadcast instruction.
18. The non-transitory machine-readable medium of claim 17 wherein the split value is to be included in an immediate of the broadcast instruction.
19. The non-transitory machine-readable medium of claim 17 wherein the split value is to be included as an operand of the broadcast instruction or read from a source register.
20. The non-transitory machine-readable medium of claim 17 wherein the split value comprises an integer value having a range of 0 to N-1, where N comprises a number of data element locations in the destination register.
21. The non-transitory machine-readable medium of claim 20 wherein the split value is to be used to identify an end of the first set of contiguous data element locations and/or a start of the second set of contiguous data element locations.
22. The non-transitory machine-readable medium of claim 17 wherein the broadcast instruction is to identify a mask field, the mask field to be used to determine, for each data element location of the destination register, whether to write a mask value or one of the first and second data elements to the data element location.
23. The non-transitory machine-readable medium of claim 22 wherein the mask field is to be included in an immediate of the broadcast instruction or stored in a third source register.
24. The non-transitory machine-readable medium of claim 22 wherein the mask value comprises a packed data element comprising all zeroes or a packed mask value stored in a mask source register.