Horizontal gate all around and FinFET device isolation
Embodiments described herein generally relate to methods and device structures for horizontal gate all around (hGAA) isolation and fin field effect transistor (FinFET) isolation. A superlattice structure comprising different materials arranged in an alternatingly stacked formation may be formed on a substrate. In one embodiment, at least one of the layers of the superlattice structure may be oxidized to form a buried oxide layer adjacent the substrate.
1. A device structure, comprising:
a silicon material layer disposed on a substrate;
a buried oxide layer disposed on the silicon material layer;
a superlattice structure disposed on the buried oxide layer in a stacked arrangement, comprising:
a plurality of first silicon germanium material layers comprising between about 20% and about 40% germanium; and
a plurality of second silicon germanium material layers comprising between about 50% and about 80% germanium, the plurality of first silicon germanium material layers and the plurality of second silicon germanium material layers disposed in an alternating stacked arrangement; and
a liner disposed on the superlattice structure.
2. The device structure of claim 1 , wherein the liner is formed on sidewalls of the superlattice structure.
3. The device structure of claim 2 , wherein the liner comprises an oxynitride material, a silicon nitride material, or combinations thereof.
4. The device structure of claim 1 , wherein the silicon material layer has a thickness of between about 5 nm and about 15 nm.
5. The device structure of claim 1 , wherein each of the first silicon germanium material layers has a thickness of between about 3 nm and about 10 nm.
6. The device structure of claim 1 , wherein each of the second silicon germanium material layers has a thickness of between about 5 nm and about 15 nm.
7. The device structure of claim 1 , further comprising:
a hardmask disposed on at least one of the plurality of first silicon germanium material layers.
8. A device structure, comprising:
an oxide layer disposed on a substrate;
a superlattice structure disposed on the oxide layer in a stacked arrangement, comprising:
a first silicon germanium material layer comprising between about 20% and about 40% germanium; and
a second silicon germanium material layer comprising between about 50% and about 80% germanium, the first silicon germanium material layer and the second silicon germanium material layer disposed in an alternating stacked arrangement; and
a liner disposed on the superlattice structure.
9. The device structure of claim 8 , further comprising:
a silicon containing material layer disposed between the substrate and the oxide layer.
10. The device structure of claim 8 , wherein the liner is formed on sidewalls of the superlattice structure.
11. The device structure of claim 8 , wherein the liner comprises an oxynitride material, a silicon nitride material, or combinations thereof.
12. The device structure of claim 8 , further comprising:
a hardmask disposed on the first silicon germanium material layer.
13. The device structure of claim 8 , wherein the first silicon germanium material layer and the second silicon germanium material layer are disposed in an alternating stacked arrangement.
14. A device structure, comprising:
an oxide layer disposed on a substrate;
a first silicon germanium material layer disposed on the substrate, the first silicon germanium material layer comprising between about 10% and about 50% germanium;
a second silicon germanium material layer disposed on the substrate, the second silicon germanium material layer comprising between about 30% and about 90% germanium, the first silicon germanium material layer and the second silicon germanium material layer disposed in an alternating stacked arrangement, and the first silicon germanium material layer, the second silicon germanium material layer, and the oxide layer disposed in a stacked arrangement; and
a liner disposed on the first silicon germanium material layer and the second silicon germanium material layer.
15. The device structure of claim 14 , further comprising:
a silicon containing material layer disposed between the substrate and the oxide layer.
16. The device structure of claim 14 , wherein the liner comprises an oxynitride material, a silicon nitride material, or combinations thereof.
17. The device structure of claim 14 , wherein the first silicon germanium material layer has a thickness of between about 3 nm and about 10 nm and the second silicon germanium material layer has a thickness of between about 5 nm and about 15 nm.