Isolation among I/O ports
Methods and apparatuses to adjust isolation between I/O ports. An apparatus includes a die, a first input or output (I/O) port, a second I/O port, and a third I/O port. The second I/O port is between the first I/O port and the third I/O port. A variable capacitor is electrically connected to the second I/O port and is configurable to adjust isolation between the first I/O port and the third I/O port. A method includes performing, by a die, a first RF function via a first I/O port; tuning a variable capacitor electrically connected to a second I/O port to adjust isolation between the first I/O port and a third I/O port, the second I/O port being between the first I/O port and the third I/O port; and performing, by the die, a second RF function via a third I/O port.
1. An apparatus, comprising:
a first input or output (I/O) port, a second I/O port, and a third I/O port of a device, wherein the first, second, and third I/O ports are electrically coupled to a circuit board outside the device that includes at least a portion of a radio frequency (RF) chain, the second I/O port located between the first I/O port and the third I/O port wherein the first, second, and third I/O ports are located along at least one geometric axis; and
a variable capacitor in the device and electrically connected to the second I/O port and configurable to adjust isolation between the first I/O port and the third I/O port, wherein the variable capacitor is not electrically connected to an antenna contained in the circuit board.
2. The apparatus of claim 1 , the device further comprising a die, wherein the variable capacitor is incorporated within the die.
3. The apparatus of claim 2 , wherein the first I/O port, the second I/O port, and the third I/O port comprising I/O bond pads of the die.
4. The apparatus of claim 2 , wherein the device comprises a packaged chip, a multiple-die assembly, a multi-chip assembly, or a mixed-chip-die assembly.
5. The apparatus of claim 4 , wherein the first I/O port, the second I/O port, and the third I/O port comprising pins of the device.
6. The apparatus of claim 5 , further comprising:
ground or at least one passive component on the circuit board, the ground or the at least one passive component being electrically connected to the variable capacitor via the second I/O port.
7. The apparatus of claim 2 , wherein the first I/O port and the third I/O port are part of a multiple-input and multiple-output system.
8. The apparatus of claim 2 , further comprising:
a fourth I/O port;
a second variable capacitor electrically connected to the fourth I/O port and configured to adjust isolation between the first I/O port and the third I/O port, the fourth I/O port being between the first I/O port and the third I/O port.
9. The apparatus of claim 2 , further comprising one of a computing system, a mobile computing system, an Internet of Things device, virtual reality system, or augmented reality system incorporating the die, the first I/O port, the second I/O port, and the third I/O port.
10. The apparatus of claim 1 , the first I/O port or the third I/O port being coupled to the antenna on the circuit board to perform an RF function.
11. The apparatus of claim 10 ,
the antenna comprising a first antenna or a second antenna,
the RF function being a first RF function or a second RF function,
the first I/O port being coupled to the first antenna to perform the first RF function, and
the third I/O port being coupled to the second antenna to perform the second RF function.
12. A method to adjust isolation among I/O ports, comprising:
performing, by a die, a first radio frequency (RF) function via a first I/O port;
tuning a variable capacitor electrically connected to a second I/O port to adjust isolation between the first I/O port and a third I/O port, the second I/O port located between the first I/O port and the third I/O port wherein the first, second, and third I/O ports are located along at least one geometric axis, and wherein the variable capacitor is not electrically connected to an antenna in a circuit board outside the die and electrically coupled to the die via at least one of the first, second, or third I/O ports; and
performing, by the die, a second RF function via the third I/O port.
13. The method of claim 12 , wherein the variable capacitor is incorporated within the die.
14. The method of claim 13 , wherein the first I/O port, the second I/O port, and the third I/O port comprising I/O bond pads of the die.
15. The method of claim 13 , wherein the die is incorporated into a device, and wherein the device comprises a packaged chip, a multiple-die assembly, a multi-chip assembly, or a mixed-chip-die assembly.
16. The method of claim 15 , wherein the first I/O port, the second I/O port, and the third I/O port comprising pins of the device.
17. The method of claim 13 , wherein tuning the variable capacitor to adjust isolation between the first I/O port and the third I/O port comprises flowing a current between the variable capacitor and ground or at least one passive component on the circuit board via the second I/O port.
18. The method of claim 13 , wherein the first RF function and the second RF function comprising multiple-input and multiple-output functions.
19. The method of claim 13 , further comprising:
tuning a second variable capacitor electrically connected to a fourth I/O port to adjust isolation between the first I/O port and the third I/O port, the fourth I/O port being between the first I/O port and the third I/O port.
20. The method of claim 12 , the first I/O port or the third I/O port being coupled to the antenna to perform the first RF function or a second RF function.
21. The method of claim 20 ,
the antenna comprising a first antenna or a second antenna,
the first I/O port being coupled to the first antenna to perform the first RF function, the third I/O port being coupled to the second antenna to the second RF function.
22. An apparatus with adjustable isolation among I/O ports, the apparatus comprising:
a memory;
at least one processor coupled to the memory;
a first I/O port;
a second I/O port; and
a third I/O port, wherein the at least one processor is configured to, at least in part with the memory,
perform a first RF function via the first I/O port;
tune a variable capacitor to adjust isolation between the first I/O port and the third I/O port, the variable capacitor being electrically connected to the second I/O port, and the second I/O port located between the first I/O port and the third I/O port wherein the first, second, and third I/O ports are located along at least one geometric axis; and
perform a second RF function via the third I/O port,
wherein the variable capacitor is not electrically connected to an antenna in a circuit board outside the die and electrically coupled to the die via at least one of the first, second, or third I/O ports.
23. The apparatus of claim 22 , further comprising a die, wherein the variable capacitor is incorporated within the die.
24. The apparatus of claim 23 , wherein the first I/O port, the second I/O port, and the third I/O port comprising I/O bond pads of the die.
25. The apparatus of claim 23 , wherein the die is incorporated into a device, and wherein the device comprises a packaged chip, a multiple-die assembly, or a multi-chip assembly.
26. The apparatus of claim 25 , wherein the first I/O port, the second I/O port, and the third I/O port comprising pins of the device.
27. The apparatus of claim 23 , wherein the at least one processor is configured to tune the variable capacitor to adjust isolation between the first I/O port and the third I/O port by flowing a current between the variable capacitor and ground or at least one passive component on the circuit board via the second I/O port.
28. The apparatus of claim 23 , wherein the first RF function and the second RF function comprising multiple-input and multiple-output functions.
29. The apparatus of claim 23 , further comprising:
a fourth I/O port; and
a second variable capacitor electrically connected to the fourth I/O port, wherein the at least one processor is further configured to, at least in part with the memory, tune the second variable capacitor to adjust isolation between the first I/O port and the third I/O port, the fourth I/O port being between the first I/O port and the third I/O port.
30. The apparatus of claim 23 , wherein the at least one processor is incorporated into a device, and wherein the device comprises one of a packaged chip, a multiple-die assembly, a multi-chip assembly, or a mixed-chip-die assembly, and wherein the first I/O port, the second I/O port, and the third I/O port comprising pins of the device.
31. The apparatus of claim 23 , further comprising one of a computing system, a mobile computing system, an Internet of Things device, virtual reality system, or augmented reality system incorporating the die, the at least one processor, the first I/O port, the second I/O port, and the third I/O port.
32. The apparatus of claim 23 , the first I/O port or the third I/O port being coupled to the antenna to perform an RF function.
33. The apparatus of claim 32 ,
the antenna comprising a first antenna or a second antenna,
the RF function being a first RF function or a second RF function,
the first I/O port being coupled to the first antenna to perform the first RF function, and
the third I/O port being coupled to the second antenna to the second RF function.